[PATCH] D159162: [llvm] Add assembly syntax highlighting

David Spickett via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 30 02:37:52 PDT 2023


DavidSpickett added a comment.

Overall this is a very cool idea. It does seem like it will need sanity checking for each architecture that enables it, but that doesn't mean opting in can't be as simple as a single bool somewhere.

I applied this and the lldb change and used `lldb/test/Shell/Commands/command-disassemble-aarch64-extensions.s` to test it since it's got most of the possible syntax in it.

First thing I notice is that in something like `smmla  v1.4s, v16.16b, v31.16b` we don't treat the `.16b` as part of the operand. Same with `/m` and friends for SVE. I thought this would be bad but in fact I like it. It makes it clear what is register and what is format/mode so no one is thinking that p0/m is literally a register called p0/m, it's p0 with the /m mode for disabled lanes.

One strange thing was in one instruction the immediate is a different colour between objdump and lldb. Objump:

  38: 54000490      bc.eq   <red>0xc8</red> <lbl>

lldb:

  test.o[0x38] <+56>:  bc.eq  <yellow>0xc8</yellow>

Then I realised that this is because lldb doesn't resolve the branch target to a label because the function ends before it would see it. so it's still an immediate operand. Objdump finds the target which makes it an address. If I add a `nop` after the label so that the label is part of the chunk lldb looks at, I get:

  test.o[0x38] <+56>:  bc.eq  <yellow>0xc8</yellow>           ; <+200>

So FYI in case you also stumble into that.


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  https://reviews.llvm.org/D159162/new/

https://reviews.llvm.org/D159162



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