[PATCH] D157495: [Atomic-Expand] Run SimplifyCFG from Atomic-Expand on CAS loop blocks.

Pravin Jagtap via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 29 23:04:13 PDT 2023


pravinjagtap updated this revision to Diff 554579.
pravinjagtap added a comment.
Herald added a subscriber: arphaman.

Experiment: Want to understand the impact of removing the aarch64 pass


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157495/new/

https://reviews.llvm.org/D157495

Files:
  llvm/include/llvm/CodeGen/AtomicExpandUtils.h
  llvm/lib/CodeGen/AtomicExpandPass.cpp
  llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-pcsections.ll
  llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-condbr-lower-tree.ll
  llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
  llvm/test/CodeGen/AArch64/aarch64-dup-dot-crash.ll
  llvm/test/CodeGen/AArch64/aarch64-fold-lslfast.ll
  llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
  llvm/test/CodeGen/AArch64/addsub.ll
  llvm/test/CodeGen/AArch64/and-mask-removal.ll
  llvm/test/CodeGen/AArch64/andorbrcompare.ll
  llvm/test/CodeGen/AArch64/arm64-ccmp.ll
  llvm/test/CodeGen/AArch64/arm64-csel.ll
  llvm/test/CodeGen/AArch64/arm64-instruction-mix-remarks.ll
  llvm/test/CodeGen/AArch64/arm64-neon-v1i1-setcc.ll
  llvm/test/CodeGen/AArch64/arm64-shrink-wrapping.ll
  llvm/test/CodeGen/AArch64/arm64-xaluo.ll
  llvm/test/CodeGen/AArch64/atomic-ops-msvc.ll
  llvm/test/CodeGen/AArch64/atomic-ops.ll
  llvm/test/CodeGen/AArch64/branch-relax-alignment.ll
  llvm/test/CodeGen/AArch64/branch-relax-asm.ll
  llvm/test/CodeGen/AArch64/branch-relax-bcc.ll
  llvm/test/CodeGen/AArch64/branch-relax-cbz.ll
  llvm/test/CodeGen/AArch64/cgp-usubo.ll
  llvm/test/CodeGen/AArch64/check-sign-bit-before-extension.ll
  llvm/test/CodeGen/AArch64/cmp-frameindex.ll
  llvm/test/CodeGen/AArch64/cmpxchg-idioms.ll
  llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
  llvm/test/CodeGen/AArch64/cond-br-tuning.ll
  llvm/test/CodeGen/AArch64/csr-split.ll
  llvm/test/CodeGen/AArch64/fast-isel-branch-cond-split.ll
  llvm/test/CodeGen/AArch64/implicit-null-check.ll
  llvm/test/CodeGen/AArch64/large-stack-cmp.ll
  llvm/test/CodeGen/AArch64/ldst-opt-after-block-placement.ll
  llvm/test/CodeGen/AArch64/ldst-paired-aliasing.ll
  llvm/test/CodeGen/AArch64/logical_shifted_reg.ll
  llvm/test/CodeGen/AArch64/machine-combiner-copy.ll
  llvm/test/CodeGen/AArch64/merge-store-dependency.ll
  llvm/test/CodeGen/AArch64/optimize-cond-branch.ll
  llvm/test/CodeGen/AArch64/pr51476.ll
  llvm/test/CodeGen/AArch64/rm_redundant_cmp.ll
  llvm/test/CodeGen/AArch64/signbit-test.ll
  llvm/test/CodeGen/AArch64/statepoint-call-lowering.ll
  llvm/test/CodeGen/AArch64/sve-breakdown-scalable-vectortype.ll
  llvm/test/CodeGen/AArch64/sve-lsr-scaled-index-addressing-mode.ll
  llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-subvector.ll
  llvm/test/CodeGen/AArch64/swifterror.ll
  llvm/test/CodeGen/AArch64/tbl-loops.ll
  llvm/test/CodeGen/AArch64/typepromotion-phisret.ll
  llvm/test/CodeGen/AArch64/use-cr-result-of-dom-icmp-st.ll
  llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-simplify-cfg-CAS-block.ll
  llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll
  llvm/test/Transforms/LoopStrengthReduce/AArch64/lsr-pre-inc-offset-check.ll

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