[PATCH] D159145: [RISCV] Don't add -unaligned-scalar-mem to target features by default.
Wang Pengcheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 29 19:40:29 PDT 2023
wangpc added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVProcessors.td:185
+ FeatureStdExtZbb,
+ FeatureUnalignedScalarMem],
[TuneSiFive7,
----------------
This can be tested in `clang/test/Driver/riscv-cpus.c`.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D159145/new/
https://reviews.llvm.org/D159145
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