[PATCH] D159152: [RISCV] Support fmaximum/fminimum for fp16 vector when only Zvfhmin enabled

[Michael Maitland via Phabricator via llvm-commits]

michaelmaitland added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:5503
   case ISD::FMINIMUM:
+    if (Op.getValueType() == MVT::nxv32f16 &&
+        (Subtarget.hasVInstructionsF16Minimal() &&
----------------
nit: maybe it makes sense for this to go in `lowerFMAXIMUM_FMINIMUM`?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159152/new/

https://reviews.llvm.org/D159152