[PATCH] D152407: [AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre.

Shu-Chun Weng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 29 10:47:46 PDT 2023


scw added a comment.

In D152407#4619082 <https://reviews.llvm.org/D152407#4619082>, @chaosdefinition wrote:

> Hi, I'm reopening this with the following updates:
>
> - Apply the quick fix described in D152407#4534022 <https://reviews.llvm.org/D152407#4534022> that disallows merging two pre-indexed loads, assuming there's no better approach.
> - Add MIR regression tests modified from @scw's reproduction .
>
> Thanks!

Test case LGTM, I don't have enough knowledge for the code to know if the proposed fix is the best way though.

Also, should this change reuse the same D number or should we create a new one?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152407/new/

https://reviews.llvm.org/D152407



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