[llvm] 294f632 - [AMDGPU] Move add64/sub64 to VALU

[Stanislav Mekhanoshin via llvm-commits]

Author: Stanislav Mekhanoshin
Date: 2023-08-29T09:31:04-07:00
New Revision: 294f632859922a638a438680023611f456400c8a

URL: https://github.com/llvm/llvm-project/commit/294f632859922a638a438680023611f456400c8a
DIFF: https://github.com/llvm/llvm-project/commit/294f632859922a638a438680023611f456400c8a.diff

LOG: [AMDGPU] Move add64/sub64 to VALU

This is NFCI as far as I can tell, but I see no reason not to do it.

Differential Revision: https://reviews.llvm.org/D159077

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 274c0c848a2c91..5b553b1136b344 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -6400,10 +6400,11 @@ void SIInstrInfo::moveToVALUImpl(SIInstrWorklist &Worklist,
   default:
     break;
   case AMDGPU::S_ADD_U64_PSEUDO:
+    NewOpcode = AMDGPU::V_ADD_U64_PSEUDO;
+    break;
   case AMDGPU::S_SUB_U64_PSEUDO:
-    splitScalar64BitAddSub(Worklist, Inst, MDT);
-    Inst.eraseFromParent();
-    return;
+    NewOpcode = AMDGPU::V_SUB_U64_PSEUDO;
+    break;
   case AMDGPU::S_ADD_I32:
   case AMDGPU::S_SUB_I32: {
     // FIXME: The u32 versions currently selected use the carry.