[PATCH] D158611: [AArch64] Fix arm neon vstx lane memVT size

[hstk via Phabricator via llvm-commits]

hstk30 updated this revision to Diff 554298.
hstk30 added a comment.

fix ld2r etc, and test case


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D158611/new/

https://reviews.llvm.org/D158611

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
  llvm/test/CodeGen/AArch64/arm64-neon-st-lane-aa.ll
  llvm/test/CodeGen/AArch64/multi-vector-load-size.ll
  llvm/test/CodeGen/AArch64/multi-vector-store-size.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D158611.554298.patch
Type: text/x-patch
Size: 13927 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230829/9db83cd8/attachment.bin>