[PATCH] D76445: [RISCV][GlobalISel] Select ALU GPR instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 553972.
craig.topper added a comment.

Add test cases for addi, andi, ori, and xori.

Still need to work on slli(w), srli(w), srai(w), and addiw.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D76445/new/

https://reviews.llvm.org/D76445

Files:
  llvm/lib/Target/RISCV/CMakeLists.txt
  llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
  llvm/lib/Target/RISCV/RISCVGISel.td
  llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
  llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv32.mir
  llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu-rv64.mir
  llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu_m-rv32.mir
  llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu_m-rv64.mir

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