[PATCH] D158950: [X86][BF16] Lower FP_EXTEND for vector types under AVX512BF16
Phoebe Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 27 23:48:46 PDT 2023
pengfei added inline comments.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:21208
+ DAG.getConstant(0, DL, IntVT));
+ In = DAG.getVectorShuffle(NVT, DL, In, DAG.getUNDEF(NVT), Mask);
+ return DAG.getBitcast(VT, In);
----------------
pengfei wrote:
> RKSimon wrote:
> > Would it be better to do a shl(zext(In,vXi32),8) here?
> Yes, thanks!
Looks like the immediate should be `16` rather than `8`
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D158950/new/
https://reviews.llvm.org/D158950
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