[llvm] 73a2eec - [LoongArch] Pre-commit test for bstrins optimization

Weining Lu via llvm-commits llvm-commits at lists.llvm.org
Sun Aug 27 18:10:50 PDT 2023


Author: Weining Lu
Date: 2023-08-28T08:36:54+08:00
New Revision: 73a2eecb217dbdfe11fd77df21a59b6c41f3c67b

URL: https://github.com/llvm/llvm-project/commit/73a2eecb217dbdfe11fd77df21a59b6c41f3c67b
DIFF: https://github.com/llvm/llvm-project/commit/73a2eecb217dbdfe11fd77df21a59b6c41f3c67b.diff

LOG: [LoongArch] Pre-commit test for bstrins optimization

Differential Revision: https://reviews.llvm.org/D158831

Added: 
    

Modified: 
    llvm/test/CodeGen/LoongArch/ir-instruction/and.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/LoongArch/ir-instruction/and.ll b/llvm/test/CodeGen/LoongArch/ir-instruction/and.ll
index bf8d8e20d9ab27..cc9dec19c8a344 100644
--- a/llvm/test/CodeGen/LoongArch/ir-instruction/and.ll
+++ b/llvm/test/CodeGen/LoongArch/ir-instruction/and.ll
@@ -425,6 +425,25 @@ define i64 @and_i64_0xfff0_multiple_times(i64 %a, i64 %b, i64 %c) {
   ret i64 %i
 }
 
+;; TODO: this can be codegened to bstrins.[wd] $a0, $zero, 23, 16.
+define i64 @and_i64_0xffffffffff00ffff(i64 %a) {
+; LA32-LABEL: and_i64_0xffffffffff00ffff:
+; LA32:       # %bb.0:
+; LA32-NEXT:    lu12i.w $a2, -4081
+; LA32-NEXT:    ori $a2, $a2, 4095
+; LA32-NEXT:    and $a0, $a0, $a2
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: and_i64_0xffffffffff00ffff:
+; LA64:       # %bb.0:
+; LA64-NEXT:    lu12i.w $a1, -4081
+; LA64-NEXT:    ori $a1, $a1, 4095
+; LA64-NEXT:    and $a0, $a0, $a1
+; LA64-NEXT:    ret
+  %b = and i64 %a, 18446744073692839935
+  ret i64 %b
+}
+
 define i32 @and_add_lsr(i32 %x, i32 %y) {
 ; LA32-LABEL: and_add_lsr:
 ; LA32:       # %bb.0:


        


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