[llvm] 57390c9 - [AMDGPU] Use isNullConstant and isOneConstant (NFC)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Sun Aug 27 08:27:02 PDT 2023
Author: Kazu Hirata
Date: 2023-08-27T08:26:52-07:00
New Revision: 57390c914bc156965c87a68b449eddc6c2434d8d
URL: https://github.com/llvm/llvm-project/commit/57390c914bc156965c87a68b449eddc6c2434d8d
DIFF: https://github.com/llvm/llvm-project/commit/57390c914bc156965c87a68b449eddc6c2434d8d.diff
LOG: [AMDGPU] Use isNullConstant and isOneConstant (NFC)
Added:
Modified:
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
index 45f1e201623e88..5c115499f88166 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
@@ -81,10 +81,9 @@ static bool isExtractHiElt(SDValue In, SDValue &Out) {
// same register.
static SDValue stripExtractLoElt(SDValue In) {
if (In.getOpcode() == ISD::EXTRACT_VECTOR_ELT) {
- if (ConstantSDNode *Idx = dyn_cast<ConstantSDNode>(In.getOperand(1))) {
- if (Idx->isZero() && In.getValueSizeInBits() <= 32)
- return In.getOperand(0);
- }
+ SDValue Idx = In.getOperand(1);
+ if (isNullConstant(Idx) && In.getValueSizeInBits() <= 32)
+ return In.getOperand(0);
}
if (In.getOpcode() == ISD::TRUNCATE) {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index 6c1774d1e90e80..d84a5097543051 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -4046,8 +4046,7 @@ static SDValue getAddOneOp(const SDNode *V) {
if (V->getOpcode() != ISD::ADD)
return SDValue();
- auto *C = dyn_cast<ConstantSDNode>(V->getOperand(1));
- return C && C->isOne() ? V->getOperand(0) : SDValue();
+ return isOneConstant(V->getOperand(1)) ? V->getOperand(0) : SDValue();
}
SDValue AMDGPUTargetLowering::performMulCombine(SDNode *N,
@@ -4277,8 +4276,7 @@ SDValue AMDGPUTargetLowering::getFFBX_U32(SelectionDAG &DAG,
SDValue AMDGPUTargetLowering::performCtlz_CttzCombine(const SDLoc &SL, SDValue Cond,
SDValue LHS, SDValue RHS,
DAGCombinerInfo &DCI) const {
- ConstantSDNode *CmpRhs = dyn_cast<ConstantSDNode>(Cond.getOperand(1));
- if (!CmpRhs || !CmpRhs->isZero())
+ if (!isNullConstant(Cond.getOperand(1)))
return SDValue();
SelectionDAG &DAG = DCI.DAG;
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 58fef0906576ca..0b2db29aed5366 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -8643,8 +8643,7 @@ SDValue SITargetLowering::LowerINTRINSIC_VOID(SDValue Op,
IntrinsicID == Intrinsic::amdgcn_struct_ptr_buffer_load_lds;
unsigned OpOffset = HasVIndex ? 1 : 0;
SDValue VOffset = Op.getOperand(5 + OpOffset);
- auto CVOffset = dyn_cast<ConstantSDNode>(VOffset);
- bool HasVOffset = !CVOffset || !CVOffset->isZero();
+ bool HasVOffset = !isNullConstant(VOffset);
unsigned Size = Op->getConstantOperandVal(4);
switch (Size) {
@@ -11101,10 +11100,8 @@ SDValue SITargetLowering::performClassCombine(SDNode *N,
SDValue Mask = N->getOperand(1);
// fp_class x, 0 -> false
- if (const ConstantSDNode *CMask = dyn_cast<ConstantSDNode>(Mask)) {
- if (CMask->isZero())
- return DAG.getConstant(0, SDLoc(N), MVT::i1);
- }
+ if (isNullConstant(Mask))
+ return DAG.getConstant(0, SDLoc(N), MVT::i1);
if (N->getOperand(0).isUndef())
return DAG.getUNDEF(MVT::i1);
@@ -12378,8 +12375,7 @@ SDValue SITargetLowering::performSubCombine(SDNode *N,
if (LHS.getOpcode() == ISD::USUBO_CARRY) {
// sub (usubo_carry x, 0, cc), y => usubo_carry x, y, cc
- auto C = dyn_cast<ConstantSDNode>(LHS.getOperand(1));
- if (!C || !C->isZero())
+ if (!isNullConstant(LHS.getOperand(1)))
return SDValue();
SDValue Args[] = { LHS.getOperand(0), RHS, LHS.getOperand(2) };
return DAG.getNode(ISD::USUBO_CARRY, SDLoc(N), LHS->getVTList(), Args);
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