[PATCH] D158673: [SDAG][RISCV] Avoid neg instructions when lowering atomic_load_sub with a constant rhs

[Yingwei Zheng via Phabricator via llvm-commits]

dtcxzyw updated this revision to Diff 553726.
dtcxzyw added a comment.

- Rebase
- Fix ARM/RISCV regression tests


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D158673/new/

https://reviews.llvm.org/D158673

Files:
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoA.td
  llvm/test/CodeGen/RISCV/atomic-rmw-sub.ll

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