[PATCH] D158879: [RISCV] Improve splatPartsI64WithVL for vlmax scalable vector constants where Hi and Lo are the same.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
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We can use a 32-bit splat and bitcast to i64 vector.

This only handles the case where we are using vlmax so that the new
vl is cheap to compute. This could be generalized to double the VL.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D158879

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
  llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll
  llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll
  llvm/test/CodeGen/RISCV/rvv/splat-vector-split-i64-vl-sdnode.ll

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