[PATCH] D158854: [RISCV] Move vmv_s_x and vfmv_s_f special casing to DAG combine

[Philip Reames via Phabricator via llvm-commits]

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We'd discussed this in the original set of patches months ago, but decided against it.  I think we should reverse ourselves here as the code is significantly more readable, and we do pick up cases we'd missed by not calling the appropriate helper routine.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D158854

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
  llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/splat-vector-split-i64-vl-sdnode.ll
  llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll

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