[llvm] ce0d16f - [NFC][AMDGPU] assert scoreboard index is in range

[Luke Drummond via llvm-commits]

Author: Luke Drummond
Date: 2023-08-25T13:30:06+01:00
New Revision: ce0d16f574f5bd81086e124345b0fe8dc4bfd95d

URL: https://github.com/llvm/llvm-project/commit/ce0d16f574f5bd81086e124345b0fe8dc4bfd95d
DIFF: https://github.com/llvm/llvm-project/commit/ce0d16f574f5bd81086e124345b0fe8dc4bfd95d.diff

LOG: [NFC][AMDGPU] assert scoreboard index is in range

`getRegInterval` can theoretically return AGPRs or SGPRS which aren't
valid when updating the VgprMemTypes array. Make this clear with an
assert.

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
index 5b3a5aafcf6143..122060e10eccca 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -678,7 +678,7 @@ void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII,
       setRegScore(RegNo + NUM_ALL_VGPRS, t, CurrScore);
     }
 #endif
-  } else {
+  } else /* LGKM_CNT || EXP_CNT || VS_CNT || NUM_INST_CNTS */ {
     // Match the score to the destination registers.
     for (unsigned I = 0, E = Inst.getNumOperands(); I != E; ++I) {
       auto &Op = Inst.getOperand(I);
@@ -689,6 +689,10 @@ void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII,
         if (Interval.first >= NUM_ALL_VGPRS)
           continue;
         if (updateVMCntOnly(Inst)) {
+          // updateVMCntOnly should only leave us with VGPRs
+          // MUBUF, MTBUF, MIMG, FlatGlobal, and FlatScratch only have VGPR/AGPR
+          // defs. That's required for a sane index into `VgprMemTypes` below
+          assert(TRI->isVectorRegister(*MRI, Op.getReg()));
           VmemType V = getVmemType(Inst);
           for (int RegNo = Interval.first; RegNo < Interval.second; ++RegNo)
             VgprVmemTypes[RegNo] |= 1 << V;