[PATCH] D158834: [NFC][AMDGPU] assert scoreboard index is in range
Luke Drummond via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 25 04:17:44 PDT 2023
ldrumm updated this revision to Diff 553434.
ldrumm added a comment.
`isVGPR` didn't account for AGPR registers which are valid
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D158834/new/
https://reviews.llvm.org/D158834
Files:
llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Index: llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -678,7 +678,7 @@
setRegScore(RegNo + NUM_ALL_VGPRS, t, CurrScore);
}
#endif
- } else {
+ } else /* LGKM_CNT || EXP_CNT || VS_CNT || NUM_INST_CNTS */ {
// Match the score to the destination registers.
for (unsigned I = 0, E = Inst.getNumOperands(); I != E; ++I) {
auto &Op = Inst.getOperand(I);
@@ -689,6 +689,10 @@
if (Interval.first >= NUM_ALL_VGPRS)
continue;
if (updateVMCntOnly(Inst)) {
+ // updateVMCntOnly should only leave us with VGPRs
+ // MUBUF, MTBUF, MIMG, FlatGlobal, and FlatScratch only have VGPR/AGPR
+ // defs. That's required for a sane index into `VgprMemTypes` below
+ assert(TRI->isVectorRegister(*MRI, Op.getReg()));
VmemType V = getVmemType(Inst);
for (int RegNo = Interval.first; RegNo < Interval.second; ++RegNo)
VgprVmemTypes[RegNo] |= 1 << V;
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