[PATCH] D158256: [RISCV] Fix assertion failure when zcmp extension is enabled.

Anmol P. Paralkar via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 24 19:49:10 PDT 2023


anmolparalkar-nxp added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/frame-lowering-crash.ll:75
+for.body:                                         ; preds = %for.cond
+  store i32 0, ptr null, align 4
+  br label %for.cond
----------------
anmolparalkar-nxp wrote:
> craig.topper wrote:
> > anmolparalkar-nxp wrote:
> > > jrtc27 wrote:
> > > > This seems overly-reduced
> > > @jrtc27 Kindly clarify (overly-reduced) I'll include matter as necessary, thanks.
> > `icmp slt i32 poison, poison` doesn't make sense. The compiler would be allowed to delete it. So a future optimization could break this test.
> > 
> > `store i32 0, ptr null, align 4` is a store to null which is undefined behavior. So the compiler is allowed to delete it. Again a future optimization could delete it and break this test.
> > `icmp slt i32 poison, poison` doesn't make sense. The compiler would be allowed to delete it. So a future optimization could break this test.
>  
> Agreed, I can rewrite without the use of poison (here and elsewhere) and preserve reproducibility.
> 
> > `store i32 0, ptr null, align 4` is a store to null which is undefined behavior. So the compiler is allowed to delete it. Again a future optimization could delete it and break this test.
> 
> - however, I am unable to reproduce the crash if I replace the 'ptr null' with a regular address. Any suggestions? Thanks.
> 

> > `store i32 0, ptr null, align 4` is a store to null which is undefined behavior. So the compiler is allowed to delete it. Again a future optimization could delete it and break this test.
> 
> - however, I am unable to reproduce the crash if I replace the 'ptr null' with a regular address. Any suggestions? Thanks.
> 

ah, never mind; I am able to reproduce the crash by replacing the 'ptr null' with:

store i32 0, ptr inttoptr (i32 -559038737 to ptr), align 4



Repository:
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  https://reviews.llvm.org/D158256/new/

https://reviews.llvm.org/D158256



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