[llvm] a0d457b - [X86] foldMaskAndShiftToScale - use MaskedValueIsZero to test for all-zero upper bits
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 24 08:51:25 PDT 2023
Author: Simon Pilgrim
Date: 2023-08-24T16:51:11+01:00
New Revision: a0d457bceca90122c7f9c1fef451f58208f92c6f
URL: https://github.com/llvm/llvm-project/commit/a0d457bceca90122c7f9c1fef451f58208f92c6f
DIFF: https://github.com/llvm/llvm-project/commit/a0d457bceca90122c7f9c1fef451f58208f92c6f.diff
LOG: [X86] foldMaskAndShiftToScale - use MaskedValueIsZero to test for all-zero upper bits
We were testing for an exact match of zero bits which isn't necessary (we don't care if lower bits are zero) - by inspection as its proven tricky to get a decent test case.
Noticed while clearing up D155472 regressions
Added:
Modified:
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index c78d984a55363b..aeaa926e72fcbd 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -2108,8 +2108,8 @@ static bool foldMaskAndShiftToScale(SelectionDAG &DAG, SDValue N,
}
APInt MaskedHighBits =
APInt::getHighBitsSet(X.getSimpleValueType().getSizeInBits(), MaskLZ);
- KnownBits Known = DAG.computeKnownBits(X);
- if (MaskedHighBits != Known.Zero) return true;
+ if (!DAG.MaskedValueIsZero(X, MaskedHighBits))
+ return true;
// We've identified a pattern that can be transformed into a single shift
// and an addressing mode. Make it so.
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