[PATCH] D158626: [AArch64] Add missing vrnd intrinsics
Max Iyengar via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 24 06:49:12 PDT 2023
miyengar marked an inline comment as done.
miyengar added a comment.
Thank you for the feedback! I've added an amended patch using the pre-existing instruction. Also, I've tried to submit the patch with context this time.
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Comment at: llvm/lib/Target/AArch64/AArch64InstrFormats.td:6297
[(set (v2f64 V128:$Rd), (OpNode (v2f64 V128:$Rn)))]>;
+ def f64 : BaseSingleOperandFPData<{0b0100, U, opc},
+ FPR64, f64, asm, null_frag>;
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dmgreen wrote:
> This looks like it is defining a new instruction. Does that already exist somewhere? Probably from somewhere like FRIntNNT.
Ah thanks! I've amended this to use the already existing instruction (FRINT32ZDr) as defined in FRIntNNT
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D158626/new/
https://reviews.llvm.org/D158626
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