[llvm] 69a0f23 - [X86] extract-bits.ll - add test showing failure to match BEXTR through ZERO_EXTEND node

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-08-24T13:14:41+01:00
New Revision: 69a0f23598ee4e5dfc79ebc77f9323c43c0c03fb

URL: https://github.com/llvm/llvm-project/commit/69a0f23598ee4e5dfc79ebc77f9323c43c0c03fb
DIFF: https://github.com/llvm/llvm-project/commit/69a0f23598ee4e5dfc79ebc77f9323c43c0c03fb.diff

LOG: [X86] extract-bits.ll - add test showing failure to match BEXTR through ZERO_EXTEND node

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/extract-bits.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/extract-bits.ll b/llvm/test/CodeGen/X86/extract-bits.ll
index de826aba54ae24..e3bce2af12d344 100644
--- a/llvm/test/CodeGen/X86/extract-bits.ll
+++ b/llvm/test/CodeGen/X86/extract-bits.ll
@@ -8598,3 +8598,30 @@ define void @c7_i64(i64 %arg, ptr %ptr) nounwind {
   store i64 %tmp2, ptr %ptr
   ret void
 }
+
+define i64 @c8_i64(i64 %arg, ptr %ptr) nounwind {
+; X86-LABEL: c8_i64:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl (%eax), %eax
+; X86-NEXT:    shrl $19, %eax
+; X86-NEXT:    andl $4092, %eax # imm = 0xFFC
+; X86-NEXT:    addl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    adcl $0, %edx
+; X86-NEXT:    retl
+;
+; X64-LABEL: c8_i64:
+; X64:       # %bb.0:
+; X64-NEXT:    movl (%rsi), %eax
+; X64-NEXT:    shrl $19, %eax
+; X64-NEXT:    andl $4092, %eax # imm = 0xFFC
+; X64-NEXT:    addq %rdi, %rax
+; X64-NEXT:    retq
+  %tmp = load i32, ptr %ptr, align 8
+  %tmp1 = lshr i32 %tmp, 19
+  %tmp2 = and i32 %tmp1, 4092
+  %tmp3 = zext i32 %tmp2 to i64
+  %tmp4 = add i64 %arg, %tmp3
+  ret i64 %tmp4
+}