[PATCH] D158631: [SROA] Skip uses of allocas where the type is scalable
Allen zhong via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 24 03:44:38 PDT 2023
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGc570531c3dcc: [SROA] Skip uses of allocas where the type is scalable (authored by Allen).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D158631/new/
https://reviews.llvm.org/D158631
Files:
llvm/lib/Transforms/Scalar/SROA.cpp
llvm/test/Transforms/SROA/scalable-vectors.ll
Index: llvm/test/Transforms/SROA/scalable-vectors.ll
===================================================================
--- llvm/test/Transforms/SROA/scalable-vectors.ll
+++ llvm/test/Transforms/SROA/scalable-vectors.ll
@@ -78,6 +78,38 @@
ret <vscale x 4 x i32> %1
}
+; Test we bail out when using an alloca of a fixed-length vector (VLS) that was
+; bitcasted to a scalable vector.
+define void @select_load_alloca_to_svdouble_t() {
+; CHECK-LABEL: @select_load_alloca_to_svdouble_t(
+; CHECK-NEXT: [[Z:%.*]] = alloca <16 x half>, align 32
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 0, 0
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], ptr [[Z]], ptr null
+; CHECK-NEXT: [[VAL:%.*]] = load <vscale x 2 x double>, ptr [[COND]], align 16
+; CHECK-NEXT: ret void
+;
+ %z = alloca <16 x half>
+ %cmp = icmp eq i32 0, 0
+ %cond = select i1 %cmp, ptr %z, ptr null
+ %val = load <vscale x 2 x double>, ptr %cond, align 16
+ ret void
+}
+
+define void @select_store_alloca_to_svdouble_t(<vscale x 2 x double> %val) {
+; CHECK-LABEL: @select_store_alloca_to_svdouble_t(
+; CHECK-NEXT: [[Z:%.*]] = alloca <16 x half>, align 32
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 0, 0
+; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], ptr [[Z]], ptr null
+; CHECK-NEXT: store <vscale x 2 x double> [[VAL:%.*]], ptr [[COND]], align 16
+; CHECK-NEXT: ret void
+;
+ %z = alloca <16 x half>
+ %cmp = icmp eq i32 0, 0
+ %cond = select i1 %cmp, ptr %z, ptr null
+ store <vscale x 2 x double> %val, ptr %cond, align 16
+ ret void
+}
+
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK-MODIFY-CFG: {{.*}}
Index: llvm/lib/Transforms/Scalar/SROA.cpp
===================================================================
--- llvm/lib/Transforms/Scalar/SROA.cpp
+++ llvm/lib/Transforms/Scalar/SROA.cpp
@@ -1169,16 +1169,24 @@
std::tie(UsedI, I) = Uses.pop_back_val();
if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
- Size =
- std::max(Size, DL.getTypeStoreSize(LI->getType()).getFixedValue());
+ TypeSize LoadSize = DL.getTypeStoreSize(LI->getType());
+ if (LoadSize.isScalable()) {
+ PI.setAborted(LI);
+ return nullptr;
+ }
+ Size = std::max(Size, LoadSize.getFixedValue());
continue;
}
if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
Value *Op = SI->getOperand(0);
if (Op == UsedI)
return SI;
- Size =
- std::max(Size, DL.getTypeStoreSize(Op->getType()).getFixedValue());
+ TypeSize StoreSize = DL.getTypeStoreSize(Op->getType());
+ if (StoreSize.isScalable()) {
+ PI.setAborted(SI);
+ return nullptr;
+ }
+ Size = std::max(Size, StoreSize.getFixedValue());
continue;
}
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