[PATCH] D158392: [RISCV] Fix `vmsge{u}.vx` lowering by not adding the mask operand if `vd == v0`

[Kiva Oyama via Phabricator via llvm-commits]

imkiva added a comment.

In D158392#4605627 <https://reviews.llvm.org/D158392#4605627>, @craig.topper wrote:

> Does binutils have the same issue? https://godbolt.org/z/zMf6xqeo7

Probably yes.

But I still think the mask operand should be transitive as lowering a masked instruction to an unmasked one may break certain constraints (?) and look wired 😕. I will post further information here when I know more.


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  https://reviews.llvm.org/D158392/new/

https://reviews.llvm.org/D158392