[PATCH] D158292: [DAGCombiner][RISCV][AArch64][PowerPC] Restrict foldAndOrOfSETCC from using SMIN/SMAX where and OR/AND would do.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 23 20:35:19 PDT 2023


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG2ad50f354a2d: [DAGCombiner][RISCV][AArch64][PowerPC] Restrict foldAndOrOfSETCC from using… (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D158292/new/

https://reviews.llvm.org/D158292

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AArch64/vecreduce-bool.ll
  llvm/test/CodeGen/PowerPC/setcc-logic.ll
  llvm/test/CodeGen/RISCV/zbb-cmp-combine.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D158292.552969.patch
Type: text/x-patch
Size: 4685 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230824/75d12df3/attachment.bin>


More information about the llvm-commits mailing list