[PATCH] D158611: [AArch64] Fix arm neon vstx lane memVT size

[Dave Green via Phabricator via llvm-commits]

dmgreen added a reviewer: efriedma.
dmgreen added a comment.

Looks good. Thanks for putting this together. It might be worth checking the tests in the pre-commit, to make sure they are passing.



================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:13911-13915
+    if (auto *StructTy = dyn_cast<StructType>(RetTy)) {
+      VecNum = StructTy->getNumElements();
+      VecTy = StructTy->getElementType(0);
+    } else
+      llvm_unreachable("aarch64_neon_ldx should return StructType");
----------------
This can probably be something like
```
auto *StructTy = cast<StructType>(RetTy);
unsigned VecNum = StructTy->getNumElements();
Type *VecTy = StructTy->getElementType(0);
```
The cast will then assert that the RetTy is a StructType.


================
Comment at: llvm/test/CodeGen/AArch64/arm64-neon-st-lane-aa.ll:1
+; RUN: llc < %s -mtriple=arm64-none-linux-gnu -mattr=+neon -O3 | FileCheck %s --check-prefix=CHECK
+ 
----------------
You might not need -O3, or `--check-prefix=CHECK`. The check lines could also be generated with update_llc_test_checks. It's a good way to generate consistent tests if it does what you need.

Also a quick comment explaining that the order of the st2 should be before the ldrb to the same address might be useful in the long run.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D158611/new/

https://reviews.llvm.org/D158611