[llvm] ef0b8cf - [AArch64][GISel] Expand coverage of FAdd and FSub.

David Green via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 23 01:51:11 PDT 2023


Author: David Green
Date: 2023-08-23T09:51:06+01:00
New Revision: ef0b8cf3f46b65532a3101c9e3dbab41e5d77db4

URL: https://github.com/llvm/llvm-project/commit/ef0b8cf3f46b65532a3101c9e3dbab41e5d77db4
DIFF: https://github.com/llvm/llvm-project/commit/ef0b8cf3f46b65532a3101c9e3dbab41e5d77db4.diff

LOG: [AArch64][GISel] Expand coverage of FAdd and FSub.

This adds some more extensive test coverage for fadd/fsub through global isel,
switching the opcodes to use the more complete ActionDefinitions to handle more
cases.

Added: 
    llvm/test/CodeGen/AArch64/faddsub.ll

Modified: 
    llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 4b059f334cfcd0..cd08bf2c1a726b 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -4831,6 +4831,7 @@ LegalizerHelper::moreElementsVector(MachineInstr &MI, unsigned TypeIdx,
   case TargetOpcode::G_SUB:
   case TargetOpcode::G_MUL:
   case TargetOpcode::G_FADD:
+  case TargetOpcode::G_FSUB:
   case TargetOpcode::G_FMUL:
   case TargetOpcode::G_UADDSAT:
   case TargetOpcode::G_USUBSAT:

diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 869d9a2b532de0..a0a03e9b15ce56 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -235,7 +235,7 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
        .clampScalar(1, s32, s64)
       .widenScalarToNextPow2(0);
 
-  getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FNEG})
+  getActionDefinitionsBuilder({G_FMUL, G_FDIV, G_FNEG})
       .legalFor({MinFPScalar, s32, s64, v2s64, v4s32, v2s32})
       .clampScalar(0, MinFPScalar, s64)
       .clampNumElements(0, v2s32, v4s32)
@@ -948,10 +948,10 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
   // TODO: Vector types.
   getActionDefinitionsBuilder({G_SADDSAT, G_SSUBSAT}).lowerIf(isScalar(0));
 
-  getActionDefinitionsBuilder({G_FABS, G_FSQRT, G_FMAXNUM, G_FMINNUM, G_FMAXIMUM,
-                               G_FMINIMUM, G_FCEIL, G_FFLOOR, G_FRINT,
-                               G_FNEARBYINT, G_INTRINSIC_TRUNC,
-                               G_INTRINSIC_ROUND, G_INTRINSIC_ROUNDEVEN})
+  getActionDefinitionsBuilder(
+      {G_FADD, G_FSUB, G_FABS, G_FSQRT, G_FMAXNUM, G_FMINNUM, G_FMAXIMUM,
+       G_FMINIMUM, G_FCEIL, G_FFLOOR, G_FRINT, G_FNEARBYINT, G_INTRINSIC_TRUNC,
+       G_INTRINSIC_ROUND, G_INTRINSIC_ROUNDEVEN})
       .legalFor({MinFPScalar, s32, s64, v2s32, v4s32, v2s64})
       .legalIf([=](const LegalityQuery &Query) {
         const auto &Ty = Query.Types[0];

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
index d1c0140e591573..403ff7e124299a 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
@@ -431,14 +431,13 @@
 # DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
 # DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
 # DEBUG-NEXT: G_FADD (opcode {{[0-9]+}}): 1 type index, 0 imm indices
-# DEBUG-NEXT: .. the first uncovered type index: 1, OK
-# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
+# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
+# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
 # DEBUG-NEXT: G_FSUB (opcode {{[0-9]+}}): 1 type index, 0 imm indices
 # DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
-# DEBUG-NEXT: .. the first uncovered type index: 1, OK
-# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
+# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
+# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
 # DEBUG-NEXT: G_FMUL (opcode {{[0-9]+}}): 1 type index, 0 imm indices
-# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
 # DEBUG-NEXT: .. the first uncovered type index: 1, OK
 # DEBUG-NEXT: .. the first uncovered imm index: 0, OK
 # DEBUG-NEXT: G_FMA (opcode {{[0-9]+}}): 1 type index, 0 imm indices
@@ -512,6 +511,7 @@
 # DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
 # DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
 # DEBUG-NEXT: G_FABS (opcode {{[0-9]+}}): 1 type index, 0 imm indices
+# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
 # DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
 # DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
 # DEBUG-NEXT: G_FCOPYSIGN (opcode {{[0-9]+}}): 2 type indices

diff  --git a/llvm/test/CodeGen/AArch64/faddsub.ll b/llvm/test/CodeGen/AArch64/faddsub.ll
new file mode 100644
index 00000000000000..c02e02d9257e9e
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/faddsub.ll
@@ -0,0 +1,1077 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc -mtriple=aarch64-none-eabi -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP16
+; RUN: llc -mtriple=aarch64-none-eabi -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP16
+; RUN: llc -mtriple=aarch64-none-eabi -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP16
+; RUN: llc -mtriple=aarch64-none-eabi -mattr=+fullfp16 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP16
+
+define double @fadd_f64(double %a, double %b) {
+; CHECK-LABEL: fadd_f64:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fadd d0, d0, d1
+; CHECK-NEXT:    ret
+entry:
+  %c = fadd double %a, %b
+  ret double %c
+}
+
+define float @fadd_f32(float %a, float %b) {
+; CHECK-LABEL: fadd_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fadd s0, s0, s1
+; CHECK-NEXT:    ret
+entry:
+  %c = fadd float %a, %b
+  ret float %c
+}
+
+define half @fadd_f16(half %a, half %b) {
+; CHECK-SD-NOFP16-LABEL: fadd_f16:
+; CHECK-SD-NOFP16:       // %bb.0: // %entry
+; CHECK-SD-NOFP16-NEXT:    fcvt s1, h1
+; CHECK-SD-NOFP16-NEXT:    fcvt s0, h0
+; CHECK-SD-NOFP16-NEXT:    fadd s0, s0, s1
+; CHECK-SD-NOFP16-NEXT:    fcvt h0, s0
+; CHECK-SD-NOFP16-NEXT:    ret
+;
+; CHECK-SD-FP16-LABEL: fadd_f16:
+; CHECK-SD-FP16:       // %bb.0: // %entry
+; CHECK-SD-FP16-NEXT:    fadd h0, h0, h1
+; CHECK-SD-FP16-NEXT:    ret
+;
+; CHECK-GI-NOFP16-LABEL: fadd_f16:
+; CHECK-GI-NOFP16:       // %bb.0: // %entry
+; CHECK-GI-NOFP16-NEXT:    fcvt s0, h0
+; CHECK-GI-NOFP16-NEXT:    fcvt s1, h1
+; CHECK-GI-NOFP16-NEXT:    fadd s0, s0, s1
+; CHECK-GI-NOFP16-NEXT:    fcvt h0, s0
+; CHECK-GI-NOFP16-NEXT:    ret
+;
+; CHECK-GI-FP16-LABEL: fadd_f16:
+; CHECK-GI-FP16:       // %bb.0: // %entry
+; CHECK-GI-FP16-NEXT:    fadd h0, h0, h1
+; CHECK-GI-FP16-NEXT:    ret
+entry:
+  %c = fadd half %a, %b
+  ret half %c
+}
+
+define <2 x double> @fadd_v2f64(<2 x double> %a, <2 x double> %b) {
+; CHECK-LABEL: fadd_v2f64:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fadd v0.2d, v0.2d, v1.2d
+; CHECK-NEXT:    ret
+entry:
+  %c = fadd <2 x double> %a, %b
+  ret <2 x double> %c
+}
+
+define <3 x double> @fadd_v3f64(<3 x double> %a, <3 x double> %b) {
+; CHECK-SD-LABEL: fadd_v3f64:
+; CHECK-SD:       // %bb.0: // %entry
+; CHECK-SD-NEXT:    // kill: def $d3 killed $d3 def $q3
+; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-SD-NEXT:    // kill: def $d4 killed $d4 def $q4
+; CHECK-SD-NEXT:    // kill: def $d1 killed $d1 def $q1
+; CHECK-SD-NEXT:    // kill: def $d2 killed $d2 def $q2
+; CHECK-SD-NEXT:    // kill: def $d5 killed $d5 def $q5
+; CHECK-SD-NEXT:    mov v3.d[1], v4.d[0]
+; CHECK-SD-NEXT:    mov v0.d[1], v1.d[0]
+; CHECK-SD-NEXT:    fadd v2.2d, v2.2d, v5.2d
+; CHECK-SD-NEXT:    // kill: def $d2 killed $d2 killed $q2
+; CHECK-SD-NEXT:    fadd v0.2d, v0.2d, v3.2d
+; CHECK-SD-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
+; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-SD-NEXT:    // kill: def $d1 killed $d1 killed $q1
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: fadd_v3f64:
+; CHECK-GI:       // %bb.0: // %entry
+; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-GI-NEXT:    // kill: def $d3 killed $d3 def $q3
+; CHECK-GI-NEXT:    // kill: def $d1 killed $d1 def $q1
+; CHECK-GI-NEXT:    // kill: def $d4 killed $d4 def $q4
+; CHECK-GI-NEXT:    fadd d2, d2, d5
+; CHECK-GI-NEXT:    mov v0.d[1], v1.d[0]
+; CHECK-GI-NEXT:    mov v3.d[1], v4.d[0]
+; CHECK-GI-NEXT:    fadd v0.2d, v0.2d, v3.2d
+; CHECK-GI-NEXT:    mov d1, v0.d[1]
+; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-GI-NEXT:    ret
+entry:
+  %c = fadd <3 x double> %a, %b
+  ret <3 x double> %c
+}
+
+define <4 x double> @fadd_v4f64(<4 x double> %a, <4 x double> %b) {
+; CHECK-SD-LABEL: fadd_v4f64:
+; CHECK-SD:       // %bb.0: // %entry
+; CHECK-SD-NEXT:    fadd v1.2d, v1.2d, v3.2d
+; CHECK-SD-NEXT:    fadd v0.2d, v0.2d, v2.2d
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: fadd_v4f64:
+; CHECK-GI:       // %bb.0: // %entry
+; CHECK-GI-NEXT:    fadd v0.2d, v0.2d, v2.2d
+; CHECK-GI-NEXT:    fadd v1.2d, v1.2d, v3.2d
+; CHECK-GI-NEXT:    ret
+entry:
+  %c = fadd <4 x double> %a, %b
+  ret <4 x double> %c
+}
+
+define <2 x float> @fadd_v2f32(<2 x float> %a, <2 x float> %b) {
+; CHECK-LABEL: fadd_v2f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fadd v0.2s, v0.2s, v1.2s
+; CHECK-NEXT:    ret
+entry:
+  %c = fadd <2 x float> %a, %b
+  ret <2 x float> %c
+}
+
+define <3 x float> @fadd_v3f32(<3 x float> %a, <3 x float> %b) {
+; CHECK-LABEL: fadd_v3f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fadd v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:    ret
+entry:
+  %c = fadd <3 x float> %a, %b
+  ret <3 x float> %c
+}
+
+define <4 x float> @fadd_v4f32(<4 x float> %a, <4 x float> %b) {
+; CHECK-LABEL: fadd_v4f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fadd v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:    ret
+entry:
+  %c = fadd <4 x float> %a, %b
+  ret <4 x float> %c
+}
+
+define <8 x float> @fadd_v8f32(<8 x float> %a, <8 x float> %b) {
+; CHECK-SD-LABEL: fadd_v8f32:
+; CHECK-SD:       // %bb.0: // %entry
+; CHECK-SD-NEXT:    fadd v1.4s, v1.4s, v3.4s
+; CHECK-SD-NEXT:    fadd v0.4s, v0.4s, v2.4s
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: fadd_v8f32:
+; CHECK-GI:       // %bb.0: // %entry
+; CHECK-GI-NEXT:    fadd v0.4s, v0.4s, v2.4s
+; CHECK-GI-NEXT:    fadd v1.4s, v1.4s, v3.4s
+; CHECK-GI-NEXT:    ret
+entry:
+  %c = fadd <8 x float> %a, %b
+  ret <8 x float> %c
+}
+
+define <7 x half> @fadd_v7f16(<7 x half> %a, <7 x half> %b) {
+; CHECK-SD-NOFP16-LABEL: fadd_v7f16:
+; CHECK-SD-NOFP16:       // %bb.0: // %entry
+; CHECK-SD-NOFP16-NEXT:    mov h2, v1.h[1]
+; CHECK-SD-NOFP16-NEXT:    mov h3, v0.h[1]
+; CHECK-SD-NOFP16-NEXT:    fcvt s4, h1
+; CHECK-SD-NOFP16-NEXT:    fcvt s5, h0
+; CHECK-SD-NOFP16-NEXT:    mov h6, v1.h[2]
+; CHECK-SD-NOFP16-NEXT:    mov h7, v0.h[2]
+; CHECK-SD-NOFP16-NEXT:    mov h16, v1.h[3]
+; CHECK-SD-NOFP16-NEXT:    fcvt s2, h2
+; CHECK-SD-NOFP16-NEXT:    fcvt s3, h3
+; CHECK-SD-NOFP16-NEXT:    fadd s4, s5, s4
+; CHECK-SD-NOFP16-NEXT:    mov h5, v0.h[3]
+; CHECK-SD-NOFP16-NEXT:    fcvt s6, h6
+; CHECK-SD-NOFP16-NEXT:    fcvt s7, h7
+; CHECK-SD-NOFP16-NEXT:    fcvt s16, h16
+; CHECK-SD-NOFP16-NEXT:    fadd s3, s3, s2
+; CHECK-SD-NOFP16-NEXT:    fcvt s5, h5
+; CHECK-SD-NOFP16-NEXT:    fcvt h2, s4
+; CHECK-SD-NOFP16-NEXT:    fadd s4, s7, s6
+; CHECK-SD-NOFP16-NEXT:    mov h6, v1.h[4]
+; CHECK-SD-NOFP16-NEXT:    mov h7, v0.h[4]
+; CHECK-SD-NOFP16-NEXT:    fcvt h3, s3
+; CHECK-SD-NOFP16-NEXT:    fadd s5, s5, s16
+; CHECK-SD-NOFP16-NEXT:    mov h16, v0.h[5]
+; CHECK-SD-NOFP16-NEXT:    fcvt h4, s4
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[1], v3.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt s3, h6
+; CHECK-SD-NOFP16-NEXT:    fcvt s6, h7
+; CHECK-SD-NOFP16-NEXT:    mov h7, v1.h[5]
+; CHECK-SD-NOFP16-NEXT:    fcvt h5, s5
+; CHECK-SD-NOFP16-NEXT:    fcvt s16, h16
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[2], v4.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov h4, v1.h[6]
+; CHECK-SD-NOFP16-NEXT:    fadd s3, s6, s3
+; CHECK-SD-NOFP16-NEXT:    mov h6, v0.h[6]
+; CHECK-SD-NOFP16-NEXT:    fcvt s7, h7
+; CHECK-SD-NOFP16-NEXT:    mov h1, v1.h[7]
+; CHECK-SD-NOFP16-NEXT:    mov h0, v0.h[7]
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[3], v5.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt s4, h4
+; CHECK-SD-NOFP16-NEXT:    fcvt h3, s3
+; CHECK-SD-NOFP16-NEXT:    fcvt s5, h6
+; CHECK-SD-NOFP16-NEXT:    fadd s6, s16, s7
+; CHECK-SD-NOFP16-NEXT:    fcvt s1, h1
+; CHECK-SD-NOFP16-NEXT:    fcvt s0, h0
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[4], v3.h[0]
+; CHECK-SD-NOFP16-NEXT:    fadd s4, s5, s4
+; CHECK-SD-NOFP16-NEXT:    fcvt h3, s6
+; CHECK-SD-NOFP16-NEXT:    fadd s0, s0, s1
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[5], v3.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt h3, s4
+; CHECK-SD-NOFP16-NEXT:    fcvt h0, s0
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[6], v3.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[7], v0.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov v0.16b, v2.16b
+; CHECK-SD-NOFP16-NEXT:    ret
+;
+; CHECK-SD-FP16-LABEL: fadd_v7f16:
+; CHECK-SD-FP16:       // %bb.0: // %entry
+; CHECK-SD-FP16-NEXT:    fadd v0.8h, v0.8h, v1.8h
+; CHECK-SD-FP16-NEXT:    ret
+;
+; CHECK-GI-NOFP16-LABEL: fadd_v7f16:
+; CHECK-GI-NOFP16:       // %bb.0: // %entry
+; CHECK-GI-NOFP16-NEXT:    mov h2, v0.h[4]
+; CHECK-GI-NOFP16-NEXT:    mov h3, v0.h[5]
+; CHECK-GI-NOFP16-NEXT:    mov h4, v1.h[4]
+; CHECK-GI-NOFP16-NEXT:    mov h5, v1.h[5]
+; CHECK-GI-NOFP16-NEXT:    fcvtl v6.4s, v0.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl v7.4s, v1.4h
+; CHECK-GI-NOFP16-NEXT:    mov h0, v0.h[6]
+; CHECK-GI-NOFP16-NEXT:    mov h1, v1.h[6]
+; CHECK-GI-NOFP16-NEXT:    mov v2.h[1], v3.h[0]
+; CHECK-GI-NOFP16-NEXT:    mov v4.h[1], v5.h[0]
+; CHECK-GI-NOFP16-NEXT:    fadd v3.4s, v6.4s, v7.4s
+; CHECK-GI-NOFP16-NEXT:    mov v2.h[2], v0.h[0]
+; CHECK-GI-NOFP16-NEXT:    mov v4.h[2], v1.h[0]
+; CHECK-GI-NOFP16-NEXT:    fcvtn v0.4h, v3.4s
+; CHECK-GI-NOFP16-NEXT:    mov v2.h[3], v0.h[0]
+; CHECK-GI-NOFP16-NEXT:    mov v4.h[3], v0.h[0]
+; CHECK-GI-NOFP16-NEXT:    mov h1, v0.h[1]
+; CHECK-GI-NOFP16-NEXT:    mov h5, v0.h[3]
+; CHECK-GI-NOFP16-NEXT:    fcvtl v2.4s, v2.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl v3.4s, v4.4h
+; CHECK-GI-NOFP16-NEXT:    mov h4, v0.h[2]
+; CHECK-GI-NOFP16-NEXT:    mov v0.h[1], v1.h[0]
+; CHECK-GI-NOFP16-NEXT:    fadd v1.4s, v2.4s, v3.4s
+; CHECK-GI-NOFP16-NEXT:    mov v0.h[2], v4.h[0]
+; CHECK-GI-NOFP16-NEXT:    fcvtn v1.4h, v1.4s
+; CHECK-GI-NOFP16-NEXT:    mov v0.h[3], v5.h[0]
+; CHECK-GI-NOFP16-NEXT:    mov h2, v1.h[1]
+; CHECK-GI-NOFP16-NEXT:    mov v0.h[4], v1.h[0]
+; CHECK-GI-NOFP16-NEXT:    mov h1, v1.h[2]
+; CHECK-GI-NOFP16-NEXT:    mov v0.h[5], v2.h[0]
+; CHECK-GI-NOFP16-NEXT:    mov v0.h[6], v1.h[0]
+; CHECK-GI-NOFP16-NEXT:    mov v0.h[7], v0.h[0]
+; CHECK-GI-NOFP16-NEXT:    ret
+;
+; CHECK-GI-FP16-LABEL: fadd_v7f16:
+; CHECK-GI-FP16:       // %bb.0: // %entry
+; CHECK-GI-FP16-NEXT:    fadd v0.8h, v0.8h, v1.8h
+; CHECK-GI-FP16-NEXT:    ret
+entry:
+  %c = fadd <7 x half> %a, %b
+  ret <7 x half> %c
+}
+
+define <4 x half> @fadd_v4f16(<4 x half> %a, <4 x half> %b) {
+; CHECK-SD-NOFP16-LABEL: fadd_v4f16:
+; CHECK-SD-NOFP16:       // %bb.0: // %entry
+; CHECK-SD-NOFP16-NEXT:    fcvtl v1.4s, v1.4h
+; CHECK-SD-NOFP16-NEXT:    fcvtl v0.4s, v0.4h
+; CHECK-SD-NOFP16-NEXT:    fadd v0.4s, v0.4s, v1.4s
+; CHECK-SD-NOFP16-NEXT:    fcvtn v0.4h, v0.4s
+; CHECK-SD-NOFP16-NEXT:    ret
+;
+; CHECK-SD-FP16-LABEL: fadd_v4f16:
+; CHECK-SD-FP16:       // %bb.0: // %entry
+; CHECK-SD-FP16-NEXT:    fadd v0.4h, v0.4h, v1.4h
+; CHECK-SD-FP16-NEXT:    ret
+;
+; CHECK-GI-NOFP16-LABEL: fadd_v4f16:
+; CHECK-GI-NOFP16:       // %bb.0: // %entry
+; CHECK-GI-NOFP16-NEXT:    fcvtl v0.4s, v0.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl v1.4s, v1.4h
+; CHECK-GI-NOFP16-NEXT:    fadd v0.4s, v0.4s, v1.4s
+; CHECK-GI-NOFP16-NEXT:    fcvtn v0.4h, v0.4s
+; CHECK-GI-NOFP16-NEXT:    ret
+;
+; CHECK-GI-FP16-LABEL: fadd_v4f16:
+; CHECK-GI-FP16:       // %bb.0: // %entry
+; CHECK-GI-FP16-NEXT:    fadd v0.4h, v0.4h, v1.4h
+; CHECK-GI-FP16-NEXT:    ret
+entry:
+  %c = fadd <4 x half> %a, %b
+  ret <4 x half> %c
+}
+
+define <8 x half> @fadd_v8f16(<8 x half> %a, <8 x half> %b) {
+; CHECK-SD-NOFP16-LABEL: fadd_v8f16:
+; CHECK-SD-NOFP16:       // %bb.0: // %entry
+; CHECK-SD-NOFP16-NEXT:    mov h2, v1.h[1]
+; CHECK-SD-NOFP16-NEXT:    mov h3, v0.h[1]
+; CHECK-SD-NOFP16-NEXT:    fcvt s4, h1
+; CHECK-SD-NOFP16-NEXT:    fcvt s5, h0
+; CHECK-SD-NOFP16-NEXT:    mov h6, v1.h[2]
+; CHECK-SD-NOFP16-NEXT:    mov h7, v0.h[2]
+; CHECK-SD-NOFP16-NEXT:    mov h16, v1.h[3]
+; CHECK-SD-NOFP16-NEXT:    fcvt s2, h2
+; CHECK-SD-NOFP16-NEXT:    fcvt s3, h3
+; CHECK-SD-NOFP16-NEXT:    fadd s4, s5, s4
+; CHECK-SD-NOFP16-NEXT:    mov h5, v0.h[3]
+; CHECK-SD-NOFP16-NEXT:    fcvt s6, h6
+; CHECK-SD-NOFP16-NEXT:    fcvt s7, h7
+; CHECK-SD-NOFP16-NEXT:    fcvt s16, h16
+; CHECK-SD-NOFP16-NEXT:    fadd s3, s3, s2
+; CHECK-SD-NOFP16-NEXT:    fcvt s5, h5
+; CHECK-SD-NOFP16-NEXT:    fcvt h2, s4
+; CHECK-SD-NOFP16-NEXT:    fadd s4, s7, s6
+; CHECK-SD-NOFP16-NEXT:    mov h6, v1.h[4]
+; CHECK-SD-NOFP16-NEXT:    mov h7, v0.h[4]
+; CHECK-SD-NOFP16-NEXT:    fcvt h3, s3
+; CHECK-SD-NOFP16-NEXT:    fadd s5, s5, s16
+; CHECK-SD-NOFP16-NEXT:    mov h16, v0.h[5]
+; CHECK-SD-NOFP16-NEXT:    fcvt h4, s4
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[1], v3.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt s3, h6
+; CHECK-SD-NOFP16-NEXT:    fcvt s6, h7
+; CHECK-SD-NOFP16-NEXT:    mov h7, v1.h[5]
+; CHECK-SD-NOFP16-NEXT:    fcvt h5, s5
+; CHECK-SD-NOFP16-NEXT:    fcvt s16, h16
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[2], v4.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov h4, v1.h[6]
+; CHECK-SD-NOFP16-NEXT:    fadd s3, s6, s3
+; CHECK-SD-NOFP16-NEXT:    mov h6, v0.h[6]
+; CHECK-SD-NOFP16-NEXT:    fcvt s7, h7
+; CHECK-SD-NOFP16-NEXT:    mov h1, v1.h[7]
+; CHECK-SD-NOFP16-NEXT:    mov h0, v0.h[7]
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[3], v5.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt s4, h4
+; CHECK-SD-NOFP16-NEXT:    fcvt h3, s3
+; CHECK-SD-NOFP16-NEXT:    fcvt s5, h6
+; CHECK-SD-NOFP16-NEXT:    fadd s6, s16, s7
+; CHECK-SD-NOFP16-NEXT:    fcvt s1, h1
+; CHECK-SD-NOFP16-NEXT:    fcvt s0, h0
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[4], v3.h[0]
+; CHECK-SD-NOFP16-NEXT:    fadd s4, s5, s4
+; CHECK-SD-NOFP16-NEXT:    fcvt h3, s6
+; CHECK-SD-NOFP16-NEXT:    fadd s0, s0, s1
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[5], v3.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt h3, s4
+; CHECK-SD-NOFP16-NEXT:    fcvt h0, s0
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[6], v3.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[7], v0.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov v0.16b, v2.16b
+; CHECK-SD-NOFP16-NEXT:    ret
+;
+; CHECK-SD-FP16-LABEL: fadd_v8f16:
+; CHECK-SD-FP16:       // %bb.0: // %entry
+; CHECK-SD-FP16-NEXT:    fadd v0.8h, v0.8h, v1.8h
+; CHECK-SD-FP16-NEXT:    ret
+;
+; CHECK-GI-NOFP16-LABEL: fadd_v8f16:
+; CHECK-GI-NOFP16:       // %bb.0: // %entry
+; CHECK-GI-NOFP16-NEXT:    fcvtl v2.4s, v0.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl v3.4s, v1.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl2 v0.4s, v0.8h
+; CHECK-GI-NOFP16-NEXT:    fcvtl2 v1.4s, v1.8h
+; CHECK-GI-NOFP16-NEXT:    fadd v2.4s, v2.4s, v3.4s
+; CHECK-GI-NOFP16-NEXT:    fadd v1.4s, v0.4s, v1.4s
+; CHECK-GI-NOFP16-NEXT:    fcvtn v0.4h, v2.4s
+; CHECK-GI-NOFP16-NEXT:    fcvtn2 v0.8h, v1.4s
+; CHECK-GI-NOFP16-NEXT:    ret
+;
+; CHECK-GI-FP16-LABEL: fadd_v8f16:
+; CHECK-GI-FP16:       // %bb.0: // %entry
+; CHECK-GI-FP16-NEXT:    fadd v0.8h, v0.8h, v1.8h
+; CHECK-GI-FP16-NEXT:    ret
+entry:
+  %c = fadd <8 x half> %a, %b
+  ret <8 x half> %c
+}
+
+define <16 x half> @fadd_v16f16(<16 x half> %a, <16 x half> %b) {
+; CHECK-SD-NOFP16-LABEL: fadd_v16f16:
+; CHECK-SD-NOFP16:       // %bb.0: // %entry
+; CHECK-SD-NOFP16-NEXT:    mov h6, v2.h[1]
+; CHECK-SD-NOFP16-NEXT:    mov h7, v0.h[1]
+; CHECK-SD-NOFP16-NEXT:    fcvt s4, h2
+; CHECK-SD-NOFP16-NEXT:    fcvt s5, h0
+; CHECK-SD-NOFP16-NEXT:    mov h16, v3.h[1]
+; CHECK-SD-NOFP16-NEXT:    mov h17, v1.h[1]
+; CHECK-SD-NOFP16-NEXT:    mov h18, v2.h[2]
+; CHECK-SD-NOFP16-NEXT:    mov h19, v0.h[2]
+; CHECK-SD-NOFP16-NEXT:    fcvt s20, h3
+; CHECK-SD-NOFP16-NEXT:    fcvt s21, h1
+; CHECK-SD-NOFP16-NEXT:    mov h22, v3.h[2]
+; CHECK-SD-NOFP16-NEXT:    mov h23, v1.h[2]
+; CHECK-SD-NOFP16-NEXT:    fcvt s6, h6
+; CHECK-SD-NOFP16-NEXT:    fcvt s7, h7
+; CHECK-SD-NOFP16-NEXT:    mov h24, v0.h[6]
+; CHECK-SD-NOFP16-NEXT:    fadd s4, s5, s4
+; CHECK-SD-NOFP16-NEXT:    fcvt s5, h16
+; CHECK-SD-NOFP16-NEXT:    fcvt s16, h17
+; CHECK-SD-NOFP16-NEXT:    fcvt s17, h18
+; CHECK-SD-NOFP16-NEXT:    fcvt s18, h19
+; CHECK-SD-NOFP16-NEXT:    mov h19, v0.h[3]
+; CHECK-SD-NOFP16-NEXT:    fadd s20, s21, s20
+; CHECK-SD-NOFP16-NEXT:    fcvt s21, h22
+; CHECK-SD-NOFP16-NEXT:    mov h22, v3.h[3]
+; CHECK-SD-NOFP16-NEXT:    fadd s6, s7, s6
+; CHECK-SD-NOFP16-NEXT:    mov h7, v2.h[3]
+; CHECK-SD-NOFP16-NEXT:    mov h25, v1.h[6]
+; CHECK-SD-NOFP16-NEXT:    fcvt h4, s4
+; CHECK-SD-NOFP16-NEXT:    fadd s5, s16, s5
+; CHECK-SD-NOFP16-NEXT:    fcvt s16, h23
+; CHECK-SD-NOFP16-NEXT:    mov h23, v1.h[3]
+; CHECK-SD-NOFP16-NEXT:    fadd s17, s18, s17
+; CHECK-SD-NOFP16-NEXT:    fcvt s18, h19
+; CHECK-SD-NOFP16-NEXT:    fcvt h6, s6
+; CHECK-SD-NOFP16-NEXT:    fcvt s7, h7
+; CHECK-SD-NOFP16-NEXT:    fcvt h19, s5
+; CHECK-SD-NOFP16-NEXT:    fcvt h5, s20
+; CHECK-SD-NOFP16-NEXT:    fadd s16, s16, s21
+; CHECK-SD-NOFP16-NEXT:    fcvt s20, h23
+; CHECK-SD-NOFP16-NEXT:    fcvt h17, s17
+; CHECK-SD-NOFP16-NEXT:    mov h21, v2.h[4]
+; CHECK-SD-NOFP16-NEXT:    mov h23, v1.h[4]
+; CHECK-SD-NOFP16-NEXT:    mov v4.h[1], v6.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt s6, h22
+; CHECK-SD-NOFP16-NEXT:    mov h22, v0.h[4]
+; CHECK-SD-NOFP16-NEXT:    fadd s7, s18, s7
+; CHECK-SD-NOFP16-NEXT:    mov h18, v3.h[4]
+; CHECK-SD-NOFP16-NEXT:    mov v5.h[1], v19.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt h16, s16
+; CHECK-SD-NOFP16-NEXT:    fadd s6, s20, s6
+; CHECK-SD-NOFP16-NEXT:    mov v4.h[2], v17.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt s17, h21
+; CHECK-SD-NOFP16-NEXT:    fcvt s19, h22
+; CHECK-SD-NOFP16-NEXT:    fcvt h7, s7
+; CHECK-SD-NOFP16-NEXT:    fcvt s18, h18
+; CHECK-SD-NOFP16-NEXT:    fcvt s20, h23
+; CHECK-SD-NOFP16-NEXT:    mov h21, v2.h[5]
+; CHECK-SD-NOFP16-NEXT:    mov h22, v0.h[5]
+; CHECK-SD-NOFP16-NEXT:    mov v5.h[2], v16.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov h16, v3.h[5]
+; CHECK-SD-NOFP16-NEXT:    mov h23, v1.h[5]
+; CHECK-SD-NOFP16-NEXT:    fcvt h6, s6
+; CHECK-SD-NOFP16-NEXT:    mov h0, v0.h[7]
+; CHECK-SD-NOFP16-NEXT:    mov h1, v1.h[7]
+; CHECK-SD-NOFP16-NEXT:    fadd s17, s19, s17
+; CHECK-SD-NOFP16-NEXT:    mov h19, v2.h[6]
+; CHECK-SD-NOFP16-NEXT:    mov v4.h[3], v7.h[0]
+; CHECK-SD-NOFP16-NEXT:    fadd s18, s20, s18
+; CHECK-SD-NOFP16-NEXT:    mov h20, v3.h[6]
+; CHECK-SD-NOFP16-NEXT:    fcvt s7, h21
+; CHECK-SD-NOFP16-NEXT:    fcvt s21, h22
+; CHECK-SD-NOFP16-NEXT:    fcvt s22, h24
+; CHECK-SD-NOFP16-NEXT:    mov h2, v2.h[7]
+; CHECK-SD-NOFP16-NEXT:    mov v5.h[3], v6.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt s6, h16
+; CHECK-SD-NOFP16-NEXT:    fcvt s16, h23
+; CHECK-SD-NOFP16-NEXT:    fcvt h17, s17
+; CHECK-SD-NOFP16-NEXT:    fcvt s19, h19
+; CHECK-SD-NOFP16-NEXT:    fcvt s23, h25
+; CHECK-SD-NOFP16-NEXT:    fcvt h18, s18
+; CHECK-SD-NOFP16-NEXT:    fcvt s20, h20
+; CHECK-SD-NOFP16-NEXT:    mov h3, v3.h[7]
+; CHECK-SD-NOFP16-NEXT:    fadd s7, s21, s7
+; CHECK-SD-NOFP16-NEXT:    fcvt s2, h2
+; CHECK-SD-NOFP16-NEXT:    fcvt s0, h0
+; CHECK-SD-NOFP16-NEXT:    fadd s6, s16, s6
+; CHECK-SD-NOFP16-NEXT:    fcvt s1, h1
+; CHECK-SD-NOFP16-NEXT:    mov v4.h[4], v17.h[0]
+; CHECK-SD-NOFP16-NEXT:    fadd s16, s22, s19
+; CHECK-SD-NOFP16-NEXT:    mov v5.h[4], v18.h[0]
+; CHECK-SD-NOFP16-NEXT:    fadd s17, s23, s20
+; CHECK-SD-NOFP16-NEXT:    fcvt s3, h3
+; CHECK-SD-NOFP16-NEXT:    fcvt h7, s7
+; CHECK-SD-NOFP16-NEXT:    fadd s0, s0, s2
+; CHECK-SD-NOFP16-NEXT:    fcvt h6, s6
+; CHECK-SD-NOFP16-NEXT:    fcvt h2, s16
+; CHECK-SD-NOFP16-NEXT:    fadd s1, s1, s3
+; CHECK-SD-NOFP16-NEXT:    mov v4.h[5], v7.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt h0, s0
+; CHECK-SD-NOFP16-NEXT:    mov v5.h[5], v6.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt h6, s17
+; CHECK-SD-NOFP16-NEXT:    fcvt h1, s1
+; CHECK-SD-NOFP16-NEXT:    mov v4.h[6], v2.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov v5.h[6], v6.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov v4.h[7], v0.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov v5.h[7], v1.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov v0.16b, v4.16b
+; CHECK-SD-NOFP16-NEXT:    mov v1.16b, v5.16b
+; CHECK-SD-NOFP16-NEXT:    ret
+;
+; CHECK-SD-FP16-LABEL: fadd_v16f16:
+; CHECK-SD-FP16:       // %bb.0: // %entry
+; CHECK-SD-FP16-NEXT:    fadd v1.8h, v1.8h, v3.8h
+; CHECK-SD-FP16-NEXT:    fadd v0.8h, v0.8h, v2.8h
+; CHECK-SD-FP16-NEXT:    ret
+;
+; CHECK-GI-NOFP16-LABEL: fadd_v16f16:
+; CHECK-GI-NOFP16:       // %bb.0: // %entry
+; CHECK-GI-NOFP16-NEXT:    fcvtl v4.4s, v0.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl v5.4s, v1.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl v6.4s, v2.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl v7.4s, v3.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl2 v0.4s, v0.8h
+; CHECK-GI-NOFP16-NEXT:    fcvtl2 v1.4s, v1.8h
+; CHECK-GI-NOFP16-NEXT:    fcvtl2 v2.4s, v2.8h
+; CHECK-GI-NOFP16-NEXT:    fcvtl2 v3.4s, v3.8h
+; CHECK-GI-NOFP16-NEXT:    fadd v4.4s, v4.4s, v6.4s
+; CHECK-GI-NOFP16-NEXT:    fadd v5.4s, v5.4s, v7.4s
+; CHECK-GI-NOFP16-NEXT:    fadd v2.4s, v0.4s, v2.4s
+; CHECK-GI-NOFP16-NEXT:    fadd v3.4s, v1.4s, v3.4s
+; CHECK-GI-NOFP16-NEXT:    fcvtn v0.4h, v4.4s
+; CHECK-GI-NOFP16-NEXT:    fcvtn v1.4h, v5.4s
+; CHECK-GI-NOFP16-NEXT:    fcvtn2 v0.8h, v2.4s
+; CHECK-GI-NOFP16-NEXT:    fcvtn2 v1.8h, v3.4s
+; CHECK-GI-NOFP16-NEXT:    ret
+;
+; CHECK-GI-FP16-LABEL: fadd_v16f16:
+; CHECK-GI-FP16:       // %bb.0: // %entry
+; CHECK-GI-FP16-NEXT:    fadd v0.8h, v0.8h, v2.8h
+; CHECK-GI-FP16-NEXT:    fadd v1.8h, v1.8h, v3.8h
+; CHECK-GI-FP16-NEXT:    ret
+entry:
+  %c = fadd <16 x half> %a, %b
+  ret <16 x half> %c
+}
+
+define double @fsub_f64(double %a, double %b) {
+; CHECK-LABEL: fsub_f64:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fsub d0, d0, d1
+; CHECK-NEXT:    ret
+entry:
+  %c = fsub double %a, %b
+  ret double %c
+}
+
+define float @fsub_f32(float %a, float %b) {
+; CHECK-LABEL: fsub_f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fsub s0, s0, s1
+; CHECK-NEXT:    ret
+entry:
+  %c = fsub float %a, %b
+  ret float %c
+}
+
+define half @fsub_f16(half %a, half %b) {
+; CHECK-SD-NOFP16-LABEL: fsub_f16:
+; CHECK-SD-NOFP16:       // %bb.0: // %entry
+; CHECK-SD-NOFP16-NEXT:    fcvt s1, h1
+; CHECK-SD-NOFP16-NEXT:    fcvt s0, h0
+; CHECK-SD-NOFP16-NEXT:    fsub s0, s0, s1
+; CHECK-SD-NOFP16-NEXT:    fcvt h0, s0
+; CHECK-SD-NOFP16-NEXT:    ret
+;
+; CHECK-SD-FP16-LABEL: fsub_f16:
+; CHECK-SD-FP16:       // %bb.0: // %entry
+; CHECK-SD-FP16-NEXT:    fsub h0, h0, h1
+; CHECK-SD-FP16-NEXT:    ret
+;
+; CHECK-GI-NOFP16-LABEL: fsub_f16:
+; CHECK-GI-NOFP16:       // %bb.0: // %entry
+; CHECK-GI-NOFP16-NEXT:    fcvt s0, h0
+; CHECK-GI-NOFP16-NEXT:    fcvt s1, h1
+; CHECK-GI-NOFP16-NEXT:    fsub s0, s0, s1
+; CHECK-GI-NOFP16-NEXT:    fcvt h0, s0
+; CHECK-GI-NOFP16-NEXT:    ret
+;
+; CHECK-GI-FP16-LABEL: fsub_f16:
+; CHECK-GI-FP16:       // %bb.0: // %entry
+; CHECK-GI-FP16-NEXT:    fsub h0, h0, h1
+; CHECK-GI-FP16-NEXT:    ret
+entry:
+  %c = fsub half %a, %b
+  ret half %c
+}
+
+define <2 x double> @fsub_v2f64(<2 x double> %a, <2 x double> %b) {
+; CHECK-LABEL: fsub_v2f64:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fsub v0.2d, v0.2d, v1.2d
+; CHECK-NEXT:    ret
+entry:
+  %c = fsub <2 x double> %a, %b
+  ret <2 x double> %c
+}
+
+define <3 x double> @fsub_v3f64(<3 x double> %a, <3 x double> %b) {
+; CHECK-SD-LABEL: fsub_v3f64:
+; CHECK-SD:       // %bb.0: // %entry
+; CHECK-SD-NEXT:    // kill: def $d3 killed $d3 def $q3
+; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-SD-NEXT:    // kill: def $d4 killed $d4 def $q4
+; CHECK-SD-NEXT:    // kill: def $d1 killed $d1 def $q1
+; CHECK-SD-NEXT:    // kill: def $d2 killed $d2 def $q2
+; CHECK-SD-NEXT:    // kill: def $d5 killed $d5 def $q5
+; CHECK-SD-NEXT:    mov v3.d[1], v4.d[0]
+; CHECK-SD-NEXT:    mov v0.d[1], v1.d[0]
+; CHECK-SD-NEXT:    fsub v2.2d, v2.2d, v5.2d
+; CHECK-SD-NEXT:    // kill: def $d2 killed $d2 killed $q2
+; CHECK-SD-NEXT:    fsub v0.2d, v0.2d, v3.2d
+; CHECK-SD-NEXT:    ext v1.16b, v0.16b, v0.16b, #8
+; CHECK-SD-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-SD-NEXT:    // kill: def $d1 killed $d1 killed $q1
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: fsub_v3f64:
+; CHECK-GI:       // %bb.0: // %entry
+; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 def $q0
+; CHECK-GI-NEXT:    // kill: def $d3 killed $d3 def $q3
+; CHECK-GI-NEXT:    // kill: def $d1 killed $d1 def $q1
+; CHECK-GI-NEXT:    // kill: def $d4 killed $d4 def $q4
+; CHECK-GI-NEXT:    fsub d2, d2, d5
+; CHECK-GI-NEXT:    mov v0.d[1], v1.d[0]
+; CHECK-GI-NEXT:    mov v3.d[1], v4.d[0]
+; CHECK-GI-NEXT:    fsub v0.2d, v0.2d, v3.2d
+; CHECK-GI-NEXT:    mov d1, v0.d[1]
+; CHECK-GI-NEXT:    // kill: def $d0 killed $d0 killed $q0
+; CHECK-GI-NEXT:    ret
+entry:
+  %c = fsub <3 x double> %a, %b
+  ret <3 x double> %c
+}
+
+define <4 x double> @fsub_v4f64(<4 x double> %a, <4 x double> %b) {
+; CHECK-SD-LABEL: fsub_v4f64:
+; CHECK-SD:       // %bb.0: // %entry
+; CHECK-SD-NEXT:    fsub v1.2d, v1.2d, v3.2d
+; CHECK-SD-NEXT:    fsub v0.2d, v0.2d, v2.2d
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: fsub_v4f64:
+; CHECK-GI:       // %bb.0: // %entry
+; CHECK-GI-NEXT:    fsub v0.2d, v0.2d, v2.2d
+; CHECK-GI-NEXT:    fsub v1.2d, v1.2d, v3.2d
+; CHECK-GI-NEXT:    ret
+entry:
+  %c = fsub <4 x double> %a, %b
+  ret <4 x double> %c
+}
+
+define <2 x float> @fsub_v2f32(<2 x float> %a, <2 x float> %b) {
+; CHECK-LABEL: fsub_v2f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fsub v0.2s, v0.2s, v1.2s
+; CHECK-NEXT:    ret
+entry:
+  %c = fsub <2 x float> %a, %b
+  ret <2 x float> %c
+}
+
+define <3 x float> @fsub_v3f32(<3 x float> %a, <3 x float> %b) {
+; CHECK-LABEL: fsub_v3f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fsub v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:    ret
+entry:
+  %c = fsub <3 x float> %a, %b
+  ret <3 x float> %c
+}
+
+define <4 x float> @fsub_v4f32(<4 x float> %a, <4 x float> %b) {
+; CHECK-LABEL: fsub_v4f32:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    fsub v0.4s, v0.4s, v1.4s
+; CHECK-NEXT:    ret
+entry:
+  %c = fsub <4 x float> %a, %b
+  ret <4 x float> %c
+}
+
+define <8 x float> @fsub_v8f32(<8 x float> %a, <8 x float> %b) {
+; CHECK-SD-LABEL: fsub_v8f32:
+; CHECK-SD:       // %bb.0: // %entry
+; CHECK-SD-NEXT:    fsub v1.4s, v1.4s, v3.4s
+; CHECK-SD-NEXT:    fsub v0.4s, v0.4s, v2.4s
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: fsub_v8f32:
+; CHECK-GI:       // %bb.0: // %entry
+; CHECK-GI-NEXT:    fsub v0.4s, v0.4s, v2.4s
+; CHECK-GI-NEXT:    fsub v1.4s, v1.4s, v3.4s
+; CHECK-GI-NEXT:    ret
+entry:
+  %c = fsub <8 x float> %a, %b
+  ret <8 x float> %c
+}
+
+define <7 x half> @fsub_v7f16(<7 x half> %a, <7 x half> %b) {
+; CHECK-SD-NOFP16-LABEL: fsub_v7f16:
+; CHECK-SD-NOFP16:       // %bb.0: // %entry
+; CHECK-SD-NOFP16-NEXT:    mov h2, v1.h[1]
+; CHECK-SD-NOFP16-NEXT:    mov h3, v0.h[1]
+; CHECK-SD-NOFP16-NEXT:    fcvt s4, h1
+; CHECK-SD-NOFP16-NEXT:    fcvt s5, h0
+; CHECK-SD-NOFP16-NEXT:    mov h6, v1.h[2]
+; CHECK-SD-NOFP16-NEXT:    mov h7, v0.h[2]
+; CHECK-SD-NOFP16-NEXT:    mov h16, v1.h[3]
+; CHECK-SD-NOFP16-NEXT:    fcvt s2, h2
+; CHECK-SD-NOFP16-NEXT:    fcvt s3, h3
+; CHECK-SD-NOFP16-NEXT:    fsub s4, s5, s4
+; CHECK-SD-NOFP16-NEXT:    mov h5, v0.h[3]
+; CHECK-SD-NOFP16-NEXT:    fcvt s6, h6
+; CHECK-SD-NOFP16-NEXT:    fcvt s7, h7
+; CHECK-SD-NOFP16-NEXT:    fcvt s16, h16
+; CHECK-SD-NOFP16-NEXT:    fsub s3, s3, s2
+; CHECK-SD-NOFP16-NEXT:    fcvt s5, h5
+; CHECK-SD-NOFP16-NEXT:    fcvt h2, s4
+; CHECK-SD-NOFP16-NEXT:    fsub s4, s7, s6
+; CHECK-SD-NOFP16-NEXT:    mov h6, v1.h[4]
+; CHECK-SD-NOFP16-NEXT:    mov h7, v0.h[4]
+; CHECK-SD-NOFP16-NEXT:    fcvt h3, s3
+; CHECK-SD-NOFP16-NEXT:    fsub s5, s5, s16
+; CHECK-SD-NOFP16-NEXT:    mov h16, v0.h[5]
+; CHECK-SD-NOFP16-NEXT:    fcvt h4, s4
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[1], v3.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt s3, h6
+; CHECK-SD-NOFP16-NEXT:    fcvt s6, h7
+; CHECK-SD-NOFP16-NEXT:    mov h7, v1.h[5]
+; CHECK-SD-NOFP16-NEXT:    fcvt h5, s5
+; CHECK-SD-NOFP16-NEXT:    fcvt s16, h16
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[2], v4.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov h4, v1.h[6]
+; CHECK-SD-NOFP16-NEXT:    fsub s3, s6, s3
+; CHECK-SD-NOFP16-NEXT:    mov h6, v0.h[6]
+; CHECK-SD-NOFP16-NEXT:    fcvt s7, h7
+; CHECK-SD-NOFP16-NEXT:    mov h1, v1.h[7]
+; CHECK-SD-NOFP16-NEXT:    mov h0, v0.h[7]
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[3], v5.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt s4, h4
+; CHECK-SD-NOFP16-NEXT:    fcvt h3, s3
+; CHECK-SD-NOFP16-NEXT:    fcvt s5, h6
+; CHECK-SD-NOFP16-NEXT:    fsub s6, s16, s7
+; CHECK-SD-NOFP16-NEXT:    fcvt s1, h1
+; CHECK-SD-NOFP16-NEXT:    fcvt s0, h0
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[4], v3.h[0]
+; CHECK-SD-NOFP16-NEXT:    fsub s4, s5, s4
+; CHECK-SD-NOFP16-NEXT:    fcvt h3, s6
+; CHECK-SD-NOFP16-NEXT:    fsub s0, s0, s1
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[5], v3.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt h3, s4
+; CHECK-SD-NOFP16-NEXT:    fcvt h0, s0
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[6], v3.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[7], v0.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov v0.16b, v2.16b
+; CHECK-SD-NOFP16-NEXT:    ret
+;
+; CHECK-SD-FP16-LABEL: fsub_v7f16:
+; CHECK-SD-FP16:       // %bb.0: // %entry
+; CHECK-SD-FP16-NEXT:    fsub v0.8h, v0.8h, v1.8h
+; CHECK-SD-FP16-NEXT:    ret
+;
+; CHECK-GI-NOFP16-LABEL: fsub_v7f16:
+; CHECK-GI-NOFP16:       // %bb.0: // %entry
+; CHECK-GI-NOFP16-NEXT:    mov h2, v0.h[4]
+; CHECK-GI-NOFP16-NEXT:    mov h3, v0.h[5]
+; CHECK-GI-NOFP16-NEXT:    mov h4, v1.h[4]
+; CHECK-GI-NOFP16-NEXT:    mov h5, v1.h[5]
+; CHECK-GI-NOFP16-NEXT:    fcvtl v6.4s, v0.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl v7.4s, v1.4h
+; CHECK-GI-NOFP16-NEXT:    mov h0, v0.h[6]
+; CHECK-GI-NOFP16-NEXT:    mov h1, v1.h[6]
+; CHECK-GI-NOFP16-NEXT:    mov v2.h[1], v3.h[0]
+; CHECK-GI-NOFP16-NEXT:    mov v4.h[1], v5.h[0]
+; CHECK-GI-NOFP16-NEXT:    fsub v3.4s, v6.4s, v7.4s
+; CHECK-GI-NOFP16-NEXT:    mov v2.h[2], v0.h[0]
+; CHECK-GI-NOFP16-NEXT:    mov v4.h[2], v1.h[0]
+; CHECK-GI-NOFP16-NEXT:    fcvtn v0.4h, v3.4s
+; CHECK-GI-NOFP16-NEXT:    mov v2.h[3], v0.h[0]
+; CHECK-GI-NOFP16-NEXT:    mov v4.h[3], v0.h[0]
+; CHECK-GI-NOFP16-NEXT:    mov h1, v0.h[1]
+; CHECK-GI-NOFP16-NEXT:    mov h5, v0.h[3]
+; CHECK-GI-NOFP16-NEXT:    fcvtl v2.4s, v2.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl v3.4s, v4.4h
+; CHECK-GI-NOFP16-NEXT:    mov h4, v0.h[2]
+; CHECK-GI-NOFP16-NEXT:    mov v0.h[1], v1.h[0]
+; CHECK-GI-NOFP16-NEXT:    fsub v1.4s, v2.4s, v3.4s
+; CHECK-GI-NOFP16-NEXT:    mov v0.h[2], v4.h[0]
+; CHECK-GI-NOFP16-NEXT:    fcvtn v1.4h, v1.4s
+; CHECK-GI-NOFP16-NEXT:    mov v0.h[3], v5.h[0]
+; CHECK-GI-NOFP16-NEXT:    mov h2, v1.h[1]
+; CHECK-GI-NOFP16-NEXT:    mov v0.h[4], v1.h[0]
+; CHECK-GI-NOFP16-NEXT:    mov h1, v1.h[2]
+; CHECK-GI-NOFP16-NEXT:    mov v0.h[5], v2.h[0]
+; CHECK-GI-NOFP16-NEXT:    mov v0.h[6], v1.h[0]
+; CHECK-GI-NOFP16-NEXT:    mov v0.h[7], v0.h[0]
+; CHECK-GI-NOFP16-NEXT:    ret
+;
+; CHECK-GI-FP16-LABEL: fsub_v7f16:
+; CHECK-GI-FP16:       // %bb.0: // %entry
+; CHECK-GI-FP16-NEXT:    fsub v0.8h, v0.8h, v1.8h
+; CHECK-GI-FP16-NEXT:    ret
+entry:
+  %c = fsub <7 x half> %a, %b
+  ret <7 x half> %c
+}
+
+define <4 x half> @fsub_v4f16(<4 x half> %a, <4 x half> %b) {
+; CHECK-SD-NOFP16-LABEL: fsub_v4f16:
+; CHECK-SD-NOFP16:       // %bb.0: // %entry
+; CHECK-SD-NOFP16-NEXT:    fcvtl v1.4s, v1.4h
+; CHECK-SD-NOFP16-NEXT:    fcvtl v0.4s, v0.4h
+; CHECK-SD-NOFP16-NEXT:    fsub v0.4s, v0.4s, v1.4s
+; CHECK-SD-NOFP16-NEXT:    fcvtn v0.4h, v0.4s
+; CHECK-SD-NOFP16-NEXT:    ret
+;
+; CHECK-SD-FP16-LABEL: fsub_v4f16:
+; CHECK-SD-FP16:       // %bb.0: // %entry
+; CHECK-SD-FP16-NEXT:    fsub v0.4h, v0.4h, v1.4h
+; CHECK-SD-FP16-NEXT:    ret
+;
+; CHECK-GI-NOFP16-LABEL: fsub_v4f16:
+; CHECK-GI-NOFP16:       // %bb.0: // %entry
+; CHECK-GI-NOFP16-NEXT:    fcvtl v0.4s, v0.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl v1.4s, v1.4h
+; CHECK-GI-NOFP16-NEXT:    fsub v0.4s, v0.4s, v1.4s
+; CHECK-GI-NOFP16-NEXT:    fcvtn v0.4h, v0.4s
+; CHECK-GI-NOFP16-NEXT:    ret
+;
+; CHECK-GI-FP16-LABEL: fsub_v4f16:
+; CHECK-GI-FP16:       // %bb.0: // %entry
+; CHECK-GI-FP16-NEXT:    fsub v0.4h, v0.4h, v1.4h
+; CHECK-GI-FP16-NEXT:    ret
+entry:
+  %c = fsub <4 x half> %a, %b
+  ret <4 x half> %c
+}
+
+define <8 x half> @fsub_v8f16(<8 x half> %a, <8 x half> %b) {
+; CHECK-SD-NOFP16-LABEL: fsub_v8f16:
+; CHECK-SD-NOFP16:       // %bb.0: // %entry
+; CHECK-SD-NOFP16-NEXT:    mov h2, v1.h[1]
+; CHECK-SD-NOFP16-NEXT:    mov h3, v0.h[1]
+; CHECK-SD-NOFP16-NEXT:    fcvt s4, h1
+; CHECK-SD-NOFP16-NEXT:    fcvt s5, h0
+; CHECK-SD-NOFP16-NEXT:    mov h6, v1.h[2]
+; CHECK-SD-NOFP16-NEXT:    mov h7, v0.h[2]
+; CHECK-SD-NOFP16-NEXT:    mov h16, v1.h[3]
+; CHECK-SD-NOFP16-NEXT:    fcvt s2, h2
+; CHECK-SD-NOFP16-NEXT:    fcvt s3, h3
+; CHECK-SD-NOFP16-NEXT:    fsub s4, s5, s4
+; CHECK-SD-NOFP16-NEXT:    mov h5, v0.h[3]
+; CHECK-SD-NOFP16-NEXT:    fcvt s6, h6
+; CHECK-SD-NOFP16-NEXT:    fcvt s7, h7
+; CHECK-SD-NOFP16-NEXT:    fcvt s16, h16
+; CHECK-SD-NOFP16-NEXT:    fsub s3, s3, s2
+; CHECK-SD-NOFP16-NEXT:    fcvt s5, h5
+; CHECK-SD-NOFP16-NEXT:    fcvt h2, s4
+; CHECK-SD-NOFP16-NEXT:    fsub s4, s7, s6
+; CHECK-SD-NOFP16-NEXT:    mov h6, v1.h[4]
+; CHECK-SD-NOFP16-NEXT:    mov h7, v0.h[4]
+; CHECK-SD-NOFP16-NEXT:    fcvt h3, s3
+; CHECK-SD-NOFP16-NEXT:    fsub s5, s5, s16
+; CHECK-SD-NOFP16-NEXT:    mov h16, v0.h[5]
+; CHECK-SD-NOFP16-NEXT:    fcvt h4, s4
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[1], v3.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt s3, h6
+; CHECK-SD-NOFP16-NEXT:    fcvt s6, h7
+; CHECK-SD-NOFP16-NEXT:    mov h7, v1.h[5]
+; CHECK-SD-NOFP16-NEXT:    fcvt h5, s5
+; CHECK-SD-NOFP16-NEXT:    fcvt s16, h16
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[2], v4.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov h4, v1.h[6]
+; CHECK-SD-NOFP16-NEXT:    fsub s3, s6, s3
+; CHECK-SD-NOFP16-NEXT:    mov h6, v0.h[6]
+; CHECK-SD-NOFP16-NEXT:    fcvt s7, h7
+; CHECK-SD-NOFP16-NEXT:    mov h1, v1.h[7]
+; CHECK-SD-NOFP16-NEXT:    mov h0, v0.h[7]
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[3], v5.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt s4, h4
+; CHECK-SD-NOFP16-NEXT:    fcvt h3, s3
+; CHECK-SD-NOFP16-NEXT:    fcvt s5, h6
+; CHECK-SD-NOFP16-NEXT:    fsub s6, s16, s7
+; CHECK-SD-NOFP16-NEXT:    fcvt s1, h1
+; CHECK-SD-NOFP16-NEXT:    fcvt s0, h0
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[4], v3.h[0]
+; CHECK-SD-NOFP16-NEXT:    fsub s4, s5, s4
+; CHECK-SD-NOFP16-NEXT:    fcvt h3, s6
+; CHECK-SD-NOFP16-NEXT:    fsub s0, s0, s1
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[5], v3.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt h3, s4
+; CHECK-SD-NOFP16-NEXT:    fcvt h0, s0
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[6], v3.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov v2.h[7], v0.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov v0.16b, v2.16b
+; CHECK-SD-NOFP16-NEXT:    ret
+;
+; CHECK-SD-FP16-LABEL: fsub_v8f16:
+; CHECK-SD-FP16:       // %bb.0: // %entry
+; CHECK-SD-FP16-NEXT:    fsub v0.8h, v0.8h, v1.8h
+; CHECK-SD-FP16-NEXT:    ret
+;
+; CHECK-GI-NOFP16-LABEL: fsub_v8f16:
+; CHECK-GI-NOFP16:       // %bb.0: // %entry
+; CHECK-GI-NOFP16-NEXT:    fcvtl v2.4s, v0.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl v3.4s, v1.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl2 v0.4s, v0.8h
+; CHECK-GI-NOFP16-NEXT:    fcvtl2 v1.4s, v1.8h
+; CHECK-GI-NOFP16-NEXT:    fsub v2.4s, v2.4s, v3.4s
+; CHECK-GI-NOFP16-NEXT:    fsub v1.4s, v0.4s, v1.4s
+; CHECK-GI-NOFP16-NEXT:    fcvtn v0.4h, v2.4s
+; CHECK-GI-NOFP16-NEXT:    fcvtn2 v0.8h, v1.4s
+; CHECK-GI-NOFP16-NEXT:    ret
+;
+; CHECK-GI-FP16-LABEL: fsub_v8f16:
+; CHECK-GI-FP16:       // %bb.0: // %entry
+; CHECK-GI-FP16-NEXT:    fsub v0.8h, v0.8h, v1.8h
+; CHECK-GI-FP16-NEXT:    ret
+entry:
+  %c = fsub <8 x half> %a, %b
+  ret <8 x half> %c
+}
+
+define <16 x half> @fsub_v16f16(<16 x half> %a, <16 x half> %b) {
+; CHECK-SD-NOFP16-LABEL: fsub_v16f16:
+; CHECK-SD-NOFP16:       // %bb.0: // %entry
+; CHECK-SD-NOFP16-NEXT:    mov h6, v2.h[1]
+; CHECK-SD-NOFP16-NEXT:    mov h7, v0.h[1]
+; CHECK-SD-NOFP16-NEXT:    fcvt s4, h2
+; CHECK-SD-NOFP16-NEXT:    fcvt s5, h0
+; CHECK-SD-NOFP16-NEXT:    mov h16, v3.h[1]
+; CHECK-SD-NOFP16-NEXT:    mov h17, v1.h[1]
+; CHECK-SD-NOFP16-NEXT:    mov h18, v2.h[2]
+; CHECK-SD-NOFP16-NEXT:    mov h19, v0.h[2]
+; CHECK-SD-NOFP16-NEXT:    fcvt s20, h3
+; CHECK-SD-NOFP16-NEXT:    fcvt s21, h1
+; CHECK-SD-NOFP16-NEXT:    mov h22, v3.h[2]
+; CHECK-SD-NOFP16-NEXT:    mov h23, v1.h[2]
+; CHECK-SD-NOFP16-NEXT:    fcvt s6, h6
+; CHECK-SD-NOFP16-NEXT:    fcvt s7, h7
+; CHECK-SD-NOFP16-NEXT:    mov h24, v0.h[6]
+; CHECK-SD-NOFP16-NEXT:    fsub s4, s5, s4
+; CHECK-SD-NOFP16-NEXT:    fcvt s5, h16
+; CHECK-SD-NOFP16-NEXT:    fcvt s16, h17
+; CHECK-SD-NOFP16-NEXT:    fcvt s17, h18
+; CHECK-SD-NOFP16-NEXT:    fcvt s18, h19
+; CHECK-SD-NOFP16-NEXT:    mov h19, v0.h[3]
+; CHECK-SD-NOFP16-NEXT:    fsub s20, s21, s20
+; CHECK-SD-NOFP16-NEXT:    fcvt s21, h22
+; CHECK-SD-NOFP16-NEXT:    mov h22, v3.h[3]
+; CHECK-SD-NOFP16-NEXT:    fsub s6, s7, s6
+; CHECK-SD-NOFP16-NEXT:    mov h7, v2.h[3]
+; CHECK-SD-NOFP16-NEXT:    mov h25, v1.h[6]
+; CHECK-SD-NOFP16-NEXT:    fcvt h4, s4
+; CHECK-SD-NOFP16-NEXT:    fsub s5, s16, s5
+; CHECK-SD-NOFP16-NEXT:    fcvt s16, h23
+; CHECK-SD-NOFP16-NEXT:    mov h23, v1.h[3]
+; CHECK-SD-NOFP16-NEXT:    fsub s17, s18, s17
+; CHECK-SD-NOFP16-NEXT:    fcvt s18, h19
+; CHECK-SD-NOFP16-NEXT:    fcvt h6, s6
+; CHECK-SD-NOFP16-NEXT:    fcvt s7, h7
+; CHECK-SD-NOFP16-NEXT:    fcvt h19, s5
+; CHECK-SD-NOFP16-NEXT:    fcvt h5, s20
+; CHECK-SD-NOFP16-NEXT:    fsub s16, s16, s21
+; CHECK-SD-NOFP16-NEXT:    fcvt s20, h23
+; CHECK-SD-NOFP16-NEXT:    fcvt h17, s17
+; CHECK-SD-NOFP16-NEXT:    mov h21, v2.h[4]
+; CHECK-SD-NOFP16-NEXT:    mov h23, v1.h[4]
+; CHECK-SD-NOFP16-NEXT:    mov v4.h[1], v6.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt s6, h22
+; CHECK-SD-NOFP16-NEXT:    mov h22, v0.h[4]
+; CHECK-SD-NOFP16-NEXT:    fsub s7, s18, s7
+; CHECK-SD-NOFP16-NEXT:    mov h18, v3.h[4]
+; CHECK-SD-NOFP16-NEXT:    mov v5.h[1], v19.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt h16, s16
+; CHECK-SD-NOFP16-NEXT:    fsub s6, s20, s6
+; CHECK-SD-NOFP16-NEXT:    mov v4.h[2], v17.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt s17, h21
+; CHECK-SD-NOFP16-NEXT:    fcvt s19, h22
+; CHECK-SD-NOFP16-NEXT:    fcvt h7, s7
+; CHECK-SD-NOFP16-NEXT:    fcvt s18, h18
+; CHECK-SD-NOFP16-NEXT:    fcvt s20, h23
+; CHECK-SD-NOFP16-NEXT:    mov h21, v2.h[5]
+; CHECK-SD-NOFP16-NEXT:    mov h22, v0.h[5]
+; CHECK-SD-NOFP16-NEXT:    mov v5.h[2], v16.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov h16, v3.h[5]
+; CHECK-SD-NOFP16-NEXT:    mov h23, v1.h[5]
+; CHECK-SD-NOFP16-NEXT:    fcvt h6, s6
+; CHECK-SD-NOFP16-NEXT:    mov h0, v0.h[7]
+; CHECK-SD-NOFP16-NEXT:    mov h1, v1.h[7]
+; CHECK-SD-NOFP16-NEXT:    fsub s17, s19, s17
+; CHECK-SD-NOFP16-NEXT:    mov h19, v2.h[6]
+; CHECK-SD-NOFP16-NEXT:    mov v4.h[3], v7.h[0]
+; CHECK-SD-NOFP16-NEXT:    fsub s18, s20, s18
+; CHECK-SD-NOFP16-NEXT:    mov h20, v3.h[6]
+; CHECK-SD-NOFP16-NEXT:    fcvt s7, h21
+; CHECK-SD-NOFP16-NEXT:    fcvt s21, h22
+; CHECK-SD-NOFP16-NEXT:    fcvt s22, h24
+; CHECK-SD-NOFP16-NEXT:    mov h2, v2.h[7]
+; CHECK-SD-NOFP16-NEXT:    mov v5.h[3], v6.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt s6, h16
+; CHECK-SD-NOFP16-NEXT:    fcvt s16, h23
+; CHECK-SD-NOFP16-NEXT:    fcvt h17, s17
+; CHECK-SD-NOFP16-NEXT:    fcvt s19, h19
+; CHECK-SD-NOFP16-NEXT:    fcvt s23, h25
+; CHECK-SD-NOFP16-NEXT:    fcvt h18, s18
+; CHECK-SD-NOFP16-NEXT:    fcvt s20, h20
+; CHECK-SD-NOFP16-NEXT:    mov h3, v3.h[7]
+; CHECK-SD-NOFP16-NEXT:    fsub s7, s21, s7
+; CHECK-SD-NOFP16-NEXT:    fcvt s2, h2
+; CHECK-SD-NOFP16-NEXT:    fcvt s0, h0
+; CHECK-SD-NOFP16-NEXT:    fsub s6, s16, s6
+; CHECK-SD-NOFP16-NEXT:    fcvt s1, h1
+; CHECK-SD-NOFP16-NEXT:    mov v4.h[4], v17.h[0]
+; CHECK-SD-NOFP16-NEXT:    fsub s16, s22, s19
+; CHECK-SD-NOFP16-NEXT:    mov v5.h[4], v18.h[0]
+; CHECK-SD-NOFP16-NEXT:    fsub s17, s23, s20
+; CHECK-SD-NOFP16-NEXT:    fcvt s3, h3
+; CHECK-SD-NOFP16-NEXT:    fcvt h7, s7
+; CHECK-SD-NOFP16-NEXT:    fsub s0, s0, s2
+; CHECK-SD-NOFP16-NEXT:    fcvt h6, s6
+; CHECK-SD-NOFP16-NEXT:    fcvt h2, s16
+; CHECK-SD-NOFP16-NEXT:    fsub s1, s1, s3
+; CHECK-SD-NOFP16-NEXT:    mov v4.h[5], v7.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt h0, s0
+; CHECK-SD-NOFP16-NEXT:    mov v5.h[5], v6.h[0]
+; CHECK-SD-NOFP16-NEXT:    fcvt h6, s17
+; CHECK-SD-NOFP16-NEXT:    fcvt h1, s1
+; CHECK-SD-NOFP16-NEXT:    mov v4.h[6], v2.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov v5.h[6], v6.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov v4.h[7], v0.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov v5.h[7], v1.h[0]
+; CHECK-SD-NOFP16-NEXT:    mov v0.16b, v4.16b
+; CHECK-SD-NOFP16-NEXT:    mov v1.16b, v5.16b
+; CHECK-SD-NOFP16-NEXT:    ret
+;
+; CHECK-SD-FP16-LABEL: fsub_v16f16:
+; CHECK-SD-FP16:       // %bb.0: // %entry
+; CHECK-SD-FP16-NEXT:    fsub v1.8h, v1.8h, v3.8h
+; CHECK-SD-FP16-NEXT:    fsub v0.8h, v0.8h, v2.8h
+; CHECK-SD-FP16-NEXT:    ret
+;
+; CHECK-GI-NOFP16-LABEL: fsub_v16f16:
+; CHECK-GI-NOFP16:       // %bb.0: // %entry
+; CHECK-GI-NOFP16-NEXT:    fcvtl v4.4s, v0.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl v5.4s, v1.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl v6.4s, v2.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl v7.4s, v3.4h
+; CHECK-GI-NOFP16-NEXT:    fcvtl2 v0.4s, v0.8h
+; CHECK-GI-NOFP16-NEXT:    fcvtl2 v1.4s, v1.8h
+; CHECK-GI-NOFP16-NEXT:    fcvtl2 v2.4s, v2.8h
+; CHECK-GI-NOFP16-NEXT:    fcvtl2 v3.4s, v3.8h
+; CHECK-GI-NOFP16-NEXT:    fsub v4.4s, v4.4s, v6.4s
+; CHECK-GI-NOFP16-NEXT:    fsub v5.4s, v5.4s, v7.4s
+; CHECK-GI-NOFP16-NEXT:    fsub v2.4s, v0.4s, v2.4s
+; CHECK-GI-NOFP16-NEXT:    fsub v3.4s, v1.4s, v3.4s
+; CHECK-GI-NOFP16-NEXT:    fcvtn v0.4h, v4.4s
+; CHECK-GI-NOFP16-NEXT:    fcvtn v1.4h, v5.4s
+; CHECK-GI-NOFP16-NEXT:    fcvtn2 v0.8h, v2.4s
+; CHECK-GI-NOFP16-NEXT:    fcvtn2 v1.8h, v3.4s
+; CHECK-GI-NOFP16-NEXT:    ret
+;
+; CHECK-GI-FP16-LABEL: fsub_v16f16:
+; CHECK-GI-FP16:       // %bb.0: // %entry
+; CHECK-GI-FP16-NEXT:    fsub v0.8h, v0.8h, v2.8h
+; CHECK-GI-FP16-NEXT:    fsub v1.8h, v1.8h, v3.8h
+; CHECK-GI-FP16-NEXT:    ret
+entry:
+  %c = fsub <16 x half> %a, %b
+  ret <16 x half> %c
+}


        


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