[PATCH] D76051: [RISCV][GlobalISel] Select register banks for GPR ALU instructions

[Nitin John Raj via Phabricator via llvm-commits]

nitinjohnraj accepted this revision.
nitinjohnraj added a comment.
This revision is now accepted and ready to land.

LGTM



================
Comment at: llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/global-rv64.mir:7
+--- |
+  @var = global i32 0
+
----------------
Should this global be an i64?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D76051/new/

https://reviews.llvm.org/D76051