[PATCH] D158529: [InferAlignment] Implement InferAlignmentPass

[Dhruv Chawla via Phabricator via llvm-commits]

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This pass aims to infer alignment for instructions as a separate pass,
to reduce redundant work done by InstCombine running multiple times. It
runs late in the pipeline, just before the back-end passes where this
information is most useful.

Adding the pass gives a 0.12% regression:
https://llvm-compile-time-tracker.com/compare.php?from=0568d1af505415d1e5e3294005062ab5c59f3a7d&to=d9100f164e08fcdbf7fc4da92975e5567215abf6&stat=instructions:u

Depends on D158527 <https://reviews.llvm.org/D158527>.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D158529

Files:
  llvm/include/llvm/Transforms/Scalar/InferAlignment.h
  llvm/include/llvm/Transforms/Utils/Local.h
  llvm/lib/Passes/PassBuilder.cpp
  llvm/lib/Passes/PassBuilderPipelines.cpp
  llvm/lib/Passes/PassRegistry.def
  llvm/lib/Transforms/Scalar/CMakeLists.txt
  llvm/lib/Transforms/Scalar/InferAlignment.cpp
  llvm/lib/Transforms/Utils/Local.cpp
  llvm/test/Other/new-pm-defaults.ll
  llvm/test/Other/new-pm-lto-defaults.ll
  llvm/test/Other/new-pm-thinlto-postlink-defaults.ll
  llvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
  llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
  llvm/test/Transforms/LoopUnroll/PowerPC/p10-respect-unroll-pragma.ll
  llvm/test/Transforms/PhaseOrdering/X86/excessive-unrolling.ll

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