[PATCH] D158465: [AMDGPU] Rename 64BitDPP feature and fix the checks

Joe Nash via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 22 10:28:09 PDT 2023


Joe_Nash added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPU.td:457
 
-def Feature64BitDPP : SubtargetFeature<"dpp-64bit",
-  "Has64BitDPP",
+def FeatureDPALU_DPP : SubtargetFeature<"dpp-64bit",
+  "HasDPALU_DPP",
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nit: Call it "DP_ALU_DPP" instead of "DPALU_DPP" because DP and ALU are acronyms in their own right?


================
Comment at: llvm/test/MC/Disassembler/AMDGPU/gfx940_features.txt:481
-# GFX940: v_cvt_pk_f32_fp8_dpp v[0:1], v3 quad_perm:[0,2,1,1] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0xac,0x00,0x7e,0x03,0x58,0x00,0xff]
-0xfa,0xac,0x00,0x7e,0x03,0x58,0x00,0xff
 
----------------
Add a disassembler error test to ensure this is forbidden?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D158465/new/

https://reviews.llvm.org/D158465



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