[PATCH] D158386: [AArch64][SME] Promote mask for masked load to a similar type size with load value.

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 22 06:59:34 PDT 2023


sdesmalen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:24966
+  // load's type then we have to extend the mask type.
+  if (Load->getExtensionType() != ISD::NON_EXTLOAD &&
+      VT.getVectorElementType().getSizeInBits() >
----------------
Is it necessary to check for the extension type? (i.e. if you remove this condition, do any tests fail?)


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:24967
+  if (!ISD::isNormalLoad(Load) &&
+      VT.getVectorElementType().getSizeInBits() >
+          Mask.getValueType().getVectorElementType().getSizeInBits())
----------------
nit: it's simpler to do `VT.getScalarSizeInBits() > Mask.getValueType().getScalarSizeInBits()`


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D158386/new/

https://reviews.llvm.org/D158386



More information about the llvm-commits mailing list