[PATCH] D158195: [RISCV] Canonicalize vrot{l,r} to vrev8 when lowering shuffle as rotate

[Luke Lau via Phabricator via llvm-commits]

luke added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:4209
+  // so canonicalize to vrev8.
+  if (RotateVT.getScalarType() == MVT::i16 && RotateAmt == 8) {
+    Rotate = DAG.getNode(ISD::BSWAP, DL, RotateVT, Op);
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craig.topper wrote:
> Do we handle FP shuffles here? If so should this be f16 too?
I don't think we can ever get an f16 element type in RotateVT, since it's always going to be larger than the original element type. E.g. i16 has to come from a shuffle of i8s


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  https://reviews.llvm.org/D158195/new/

https://reviews.llvm.org/D158195