[PATCH] D158053: [Legalizer] Expand fmaximum and fminimum

[Qiu Chaofan via Phabricator via llvm-commits]

qiucf added a comment.

In D158053#4598440 <https://reviews.llvm.org/D158053#4598440>, @arsenm wrote:

> I think we should either define the existing FMINNUM_IEEE/FMAXNUM_IEEE to have the correct IEEE 2019 signed zero ordering (I can't name a target that doesn't have this behavior), or we have to add a pair of DAG nodes that do

Some targets have instructions legal for `fminnum_ieee`. It's better to add new one.



================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:8161
+        *DAG.getContext(), APFloat::getNaN(DAG.EVTToAPFloatSemantics(VT)));
+    MinMax = DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, LHS, RHS, ISD::SETUO),
+                           DAG.getConstantFP(*FPNaN, DL, VT), MinMax);
----------------
tra wrote:
> Are we expected to return *a* NaN or the specific NaN value of one of the arguments? 
> APfloat's implementation returns one of the argument values.
> X86ISelLowering.cpp does the same.
> 
> 
Does the standard specify if the exact NaN should be returned? Choosing one NaN will produce more complex code. 


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