[PATCH] D158147: [RFC][GlobalISel] convergence control tokens and intrinsics
Sameer Sahasrabuddhe via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 21 22:50:11 PDT 2023
sameerds updated this revision to Diff 552221.
sameerds added a comment.
- rebased
- addressed some review comments
- added machine verifier
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D158147/new/
https://reviews.llvm.org/D158147
Files:
llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
llvm/include/llvm/CodeGen/LowLevelType.h
llvm/include/llvm/CodeGen/MachineConvergenceVerifier.h
llvm/lib/CodeGen/CMakeLists.txt
llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
llvm/lib/CodeGen/LowLevelTypeUtils.cpp
llvm/lib/CodeGen/MIRParser/MIParser.cpp
llvm/lib/CodeGen/MachineConvergenceVerifier.cpp
llvm/lib/CodeGen/MachineVerifier.cpp
llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
llvm/test/CodeGen/AMDGPU/GlobalISel/convergence-tokens.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-convergence-tokens.ll
llvm/test/CodeGen/AMDGPU/verify-convergencectrl/basic.mir
llvm/test/CodeGen/AMDGPU/verify-convergencectrl/cycles.mir
llvm/test/CodeGen/AMDGPU/verify-convergencectrl/mixed2.mir
llvm/test/CodeGen/AMDGPU/verify-convergencectrl/region-nesting.mir
llvm/test/CodeGen/MIR/AArch64/parse-low-level-type-invalid4.mir
llvm/test/CodeGen/MIR/AArch64/parse-low-level-type-invalid6.mir
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