[PATCH] D158368: [AMDGPU][MISCHED] GCNBalancedSchedStrategy.

[Jeffrey Byrnes via Phabricator via llvm-commits]

jrbyrnes added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp:1474
+  bool Result = false;
+  unsigned ScheduleLength = Top.getCurrCycle() + Bot.getCurrCycle();
+#ifndef NDEBUG
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alex-t wrote:
> jrbyrnes wrote:
> > I think this is a lower bound on what we have previously called ScheduleLength? 
> Exactly. I realized that the ratio of the total stall cycles to the total amount of instructions better reflects the metric than the ratio of total stalls to the modeled length (i.e., the total amount of working cycles + the total amount of stalls).
That makes sense -- though, I would think we would still want to capture the latency as well. For example, StallTotal of say 15 when the total instruction latency is 30 means something different than if the total instruction latency was 150 (even if number of instructions is the same) -- the second schedule is able to hide latency better, thus has better ILP.


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https://reviews.llvm.org/D158368