[PATCH] D158449: [IR]Add NumSrcElts param to is..Mask static function in ShuffleVectorInst.

[Alexey Bataev via Phabricator via llvm-commits]

ABataev created this revision.
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Need to add NumSrcElts param to is..Mask functions in
ShuffleVectorInstruction class for better mask analysis. Mask.size() not
always matches the sizes of the permuted vector(s). Allows to better
estimate the cost in SLP and fix uses of the functions in other cases.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D158449

Files:
  llvm/include/llvm/CodeGen/BasicTTIImpl.h
  llvm/include/llvm/IR/Instructions.h
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/IR/Instructions.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
  llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
  llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
  llvm/test/Transforms/SLPVectorizer/AMDGPU/add_sub_sat-inseltpoison.ll
  llvm/test/Transforms/SLPVectorizer/AMDGPU/add_sub_sat.ll
  llvm/test/Transforms/SLPVectorizer/AMDGPU/crash_extract_subvector_cost.ll
  llvm/test/Transforms/SLPVectorizer/AMDGPU/phi-result-use-order.ll
  llvm/test/Transforms/SLPVectorizer/RISCV/math-function.ll
  llvm/test/Transforms/SLPVectorizer/X86/alternate-calls-inseltpoison.ll
  llvm/test/Transforms/SLPVectorizer/X86/alternate-calls.ll
  llvm/test/Transforms/SLPVectorizer/X86/hadd-inseltpoison.ll
  llvm/test/Transforms/SLPVectorizer/X86/hadd.ll
  llvm/test/Transforms/SLPVectorizer/X86/hsub-inseltpoison.ll
  llvm/test/Transforms/SLPVectorizer/X86/hsub.ll
  llvm/test/Transforms/SLPVectorizer/X86/reduction-transpose.ll
  llvm/unittests/IR/InstructionsTest.cpp
  llvm/unittests/IR/ShuffleVectorInstTest.cpp

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