[llvm] 69bd66b - [Tests] Remove some and/or constant expressions in tests (NFC)

Nikita Popov via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 21 03:06:52 PDT 2023


Author: Nikita Popov
Date: 2023-08-21T12:05:32+02:00
New Revision: 69bd66b3ced6a295b302c6548aba11d7734c2cd7

URL: https://github.com/llvm/llvm-project/commit/69bd66b3ced6a295b302c6548aba11d7734c2cd7
DIFF: https://github.com/llvm/llvm-project/commit/69bd66b3ced6a295b302c6548aba11d7734c2cd7.diff

LOG: [Tests] Remove some and/or constant expressions in tests (NFC)

In preparation for their removal in D158081.

Added: 
    

Modified: 
    llvm/test/Analysis/ValueTracking/func-ptr-lsb.ll
    llvm/test/Assembler/2009-03-24-ZextConstantExpr.ll
    llvm/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll
    llvm/test/CodeGen/ARM/2012-01-23-PostRA-LICM.ll
    llvm/test/CodeGen/ARM/load-address-masked.ll
    llvm/test/CodeGen/Hexagon/packetize-l2fetch.ll
    llvm/test/CodeGen/Mips/pr42736.ll
    llvm/test/CodeGen/X86/2007-04-24-VectorCrash.ll
    llvm/test/CodeGen/X86/2012-03-20-LargeConstantExpr.ll
    llvm/test/CodeGen/X86/address-type-promotion-constantexpr.ll
    llvm/test/CodeGen/X86/br-fold.ll
    llvm/test/CodeGen/X86/pre-coalesce-2.ll
    llvm/test/CodeGen/X86/tailcall-returndup-void.ll
    llvm/test/CodeGen/X86/x86-64-tls-1.ll
    llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
    llvm/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll
    llvm/test/Transforms/InstCombine/2012-3-15-or-xor-constant.ll
    llvm/test/Transforms/InstCombine/constant-expr-datalayout.ll
    llvm/test/Transforms/InstCombine/gepgep.ll
    llvm/test/Transforms/InstCombine/icmp-mul.ll
    llvm/test/Transforms/InstCombine/not-add.ll
    llvm/test/Transforms/LICM/pr23608.ll
    llvm/test/Transforms/LoopIdiom/basic.ll
    llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
    llvm/test/Transforms/SimplifyCFG/PR9946.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Analysis/ValueTracking/func-ptr-lsb.ll b/llvm/test/Analysis/ValueTracking/func-ptr-lsb.ll
index 557e1e12fd72cb..301551c00b8ff0 100644
--- a/llvm/test/Analysis/ValueTracking/func-ptr-lsb.ll
+++ b/llvm/test/Analysis/ValueTracking/func-ptr-lsb.ll
@@ -9,7 +9,8 @@ entry:
   ; Even though the address of @foo is aligned, we cannot assume that the
   ; pointer has the same alignment. This is not true for e.g. ARM targets
   ; which store ARM/Thumb state in the LSB
-  ret i32 and (i32 ptrtoint (ptr @foo to i32), i32 -4)
+  %and = and i32 ptrtoint (ptr @foo to i32), -4
+  ret i32 %and
 }
 
 define internal void @foo() align 16 {

diff  --git a/llvm/test/Assembler/2009-03-24-ZextConstantExpr.ll b/llvm/test/Assembler/2009-03-24-ZextConstantExpr.ll
index 796f1073a8de78..bd454204c94ab4 100644
--- a/llvm/test/Assembler/2009-03-24-ZextConstantExpr.ll
+++ b/llvm/test/Assembler/2009-03-24-ZextConstantExpr.ll
@@ -4,7 +4,7 @@
 @gdtr = external global [0 x i8]
 
 define void @test() {
-	call zeroext i1 @paging_map(i64 zext (i32 and (i32 ptrtoint (ptr @gdtr to i32), i32 -4096) to i64))
+	call zeroext i1 @paging_map(i64 zext (i32 add (i32 ptrtoint (ptr @gdtr to i32), i32 -4096) to i64))
 	ret void
 }
 

diff  --git a/llvm/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll b/llvm/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll
index e0143e029d086b..c9acfcb65fe935 100644
--- a/llvm/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll
+++ b/llvm/test/CodeGen/ARM/2007-04-03-UndefinedSymbol.ll
@@ -27,7 +27,9 @@ entry:
   %b.i1 = alloca %struct.B, align 4
   %b.i = alloca %struct.B, align 4
   store i32 4, ptr %b.i
-  br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (ptr @_ZN1B1iEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit, label %cond_true.i
+  %and1 = and i64 zext (i32 ptrtoint (ptr @_ZN1B1iEv to i32) to i64), 4294967296
+  %cmp1 = icmp eq i64 %and1, 0
+  br i1 %cmp1, label %_Z3fooiM1BFvvE.exit, label %cond_true.i
 
 cond_true.i:
   %ctg23.i = getelementptr i8, ptr %b.i, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (ptr @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1)
@@ -41,7 +43,9 @@ _Z3fooiM1BFvvE.exit:
   %ctg25.i = getelementptr i8, ptr %b.i, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (ptr @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1)
   call void %iftmp.2.0.i(ptr %ctg25.i)
   store i32 6, ptr %b.i29
-  br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (ptr @_ZN1B1jEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit56, label %cond_true.i46
+  %and2 = and i64 zext (i32 ptrtoint (ptr @_ZN1B1iEv to i32) to i64), 4294967296
+  %cmp2 = icmp eq i64 %and2, 0
+  br i1 %cmp2, label %_Z3fooiM1BFvvE.exit56, label %cond_true.i46
 
 cond_true.i46:
   %ctg23.i36 = getelementptr i8, ptr %b.i29, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (ptr @_ZN1B1jEv to i32) to i64), i64 32) to i32), i32 1)
@@ -55,7 +59,9 @@ _Z3fooiM1BFvvE.exit56:
   %ctg25.i54 = getelementptr i8, ptr %b.i29, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (ptr @_ZN1B1jEv to i32) to i64), i64 32) to i32), i32 1)
   call void %iftmp.2.0.i49(ptr %ctg25.i54)
   store i32 -1, ptr %b.i1
-  br i1 icmp eq (i64 and (i64 zext (i32 ptrtoint (ptr @_ZN1B1iEv to i32) to i64), i64 4294967296), i64 0), label %_Z3fooiM1BFvvE.exit28, label %cond_true.i18
+  %and3 = and i64 zext (i32 ptrtoint (ptr @_ZN1B1iEv to i32) to i64), 4294967296
+  %cmp3 = icmp eq i64 %and3, 0
+  br i1 %cmp3, label %_Z3fooiM1BFvvE.exit28, label %cond_true.i18
 
 cond_true.i18:
   %ctg23.i8 = getelementptr i8, ptr %b.i1, i32 ashr (i32 trunc (i64 lshr (i64 zext (i32 ptrtoint (ptr @_ZN1B1iEv to i32) to i64), i64 32) to i32), i32 1)

diff  --git a/llvm/test/CodeGen/ARM/2012-01-23-PostRA-LICM.ll b/llvm/test/CodeGen/ARM/2012-01-23-PostRA-LICM.ll
index 0fe855eea57f79..667b61709893e3 100644
--- a/llvm/test/CodeGen/ARM/2012-01-23-PostRA-LICM.ll
+++ b/llvm/test/CodeGen/ARM/2012-01-23-PostRA-LICM.ll
@@ -22,7 +22,9 @@ bb4:                                              ; preds = %bb3
   %tmp6 = and <4 x i32> %tmp5, <i32 8388607, i32 8388607, i32 8388607, i32 8388607>
   %tmp7 = or <4 x i32> %tmp6, <i32 1065353216, i32 1065353216, i32 1065353216, i32 1065353216>
   %tmp8 = bitcast <4 x i32> %tmp7 to <4 x float>
-  %tmp9 = fsub <4 x float> %tmp8, bitcast (i128 or (i128 shl (i128 zext (i64 trunc (i128 lshr (i128 bitcast (<4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> to i128), i128 64) to i64) to i128), i128 64), i128 zext (i64 trunc (i128 bitcast (<4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> to i128) to i64) to i128)) to <4 x float>)
+  %or = or i128 shl (i128 zext (i64 trunc (i128 lshr (i128 bitcast (<4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> to i128), i128 64) to i64) to i128), i128 64), zext (i64 trunc (i128 bitcast (<4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> to i128) to i64) to i128)
+  %bc = bitcast i128 %or to <4 x float>
+  %tmp9 = fsub <4 x float> %tmp8, %bc
   %tmp10 = fmul <4 x float> undef, %tmp9
   %tmp11 = fadd <4 x float> undef, %tmp10
   %tmp12 = bitcast <4 x float> zeroinitializer to i128
@@ -47,7 +49,9 @@ bb4:                                              ; preds = %bb3
   %tmp30 = and <4 x i32> %tmp29, <i32 8388607, i32 8388607, i32 8388607, i32 8388607>
   %tmp31 = or <4 x i32> %tmp30, <i32 1065353216, i32 1065353216, i32 1065353216, i32 1065353216>
   %tmp32 = bitcast <4 x i32> %tmp31 to <4 x float>
-  %tmp33 = fsub <4 x float> %tmp32, bitcast (i128 or (i128 shl (i128 zext (i64 trunc (i128 lshr (i128 bitcast (<4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> to i128), i128 64) to i64) to i128), i128 64), i128 zext (i64 trunc (i128 bitcast (<4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> to i128) to i64) to i128)) to <4 x float>)
+  %or2 = or i128 shl (i128 zext (i64 trunc (i128 lshr (i128 bitcast (<4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> to i128), i128 64) to i64) to i128), i128 64), zext (i64 trunc (i128 bitcast (<4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> to i128) to i64) to i128)
+  %bc2 = bitcast i128 %or2 to <4 x float>
+  %tmp33 = fsub <4 x float> %tmp32, %bc2
   %tmp34 = call <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float> undef, <4 x float> %tmp28) nounwind
   %tmp35 = fmul <4 x float> %tmp34, undef
   %tmp36 = fmul <4 x float> %tmp35, undef

diff  --git a/llvm/test/CodeGen/ARM/load-address-masked.ll b/llvm/test/CodeGen/ARM/load-address-masked.ll
index f15523cbad85dd..4ba0b6af415c10 100644
--- a/llvm/test/CodeGen/ARM/load-address-masked.ll
+++ b/llvm/test/CodeGen/ARM/load-address-masked.ll
@@ -7,7 +7,8 @@ target triple = "armv4t-unknown-linux-gnueabi"
 
 define i32 @foo() {
 entry:
-  ret i32 and (i32 ptrtoint (ptr @a to i32), i32 255)
+  %and = and i32 ptrtoint (ptr @a to i32), 255
+  ret i32 %and
 }
 
 ; CHECK-LABEL: foo:

diff  --git a/llvm/test/CodeGen/Hexagon/packetize-l2fetch.ll b/llvm/test/CodeGen/Hexagon/packetize-l2fetch.ll
index 8c057b67da033d..9eeca4f252a65f 100644
--- a/llvm/test/CodeGen/Hexagon/packetize-l2fetch.ll
+++ b/llvm/test/CodeGen/Hexagon/packetize-l2fetch.ll
@@ -16,8 +16,10 @@ target triple = "hexagon"
 ; Function Attrs: nounwind
 define void @f0() local_unnamed_addr #0 {
 b0:
-  store ptr inttoptr (i32 and (i32 sext (i8 ptrtoint (ptr getelementptr inbounds ([32768 x i8], ptr @g0, i32 0, i32 10000) to i8) to i32), i32 -65536) to ptr), ptr getelementptr inbounds ([15 x ptr], ptr @g1, i32 0, i32 1), align 4
-  store ptr inttoptr (i32 and (i32 sext (i8 ptrtoint (ptr getelementptr inbounds ([32768 x i8], ptr @g0, i32 0, i32 10000) to i8) to i32), i32 -65536) to ptr), ptr getelementptr inbounds ([15 x ptr], ptr @g1, i32 0, i32 6), align 8
+  %and = and i32 sext (i8 ptrtoint (ptr getelementptr inbounds ([32768 x i8], ptr @g0, i32 0, i32 10000) to i8) to i32), -65536
+  %ptr = inttoptr i32 %and to ptr
+  store ptr %ptr, ptr getelementptr inbounds ([15 x ptr], ptr @g1, i32 0, i32 1), align 4
+  store ptr %ptr, ptr getelementptr inbounds ([15 x ptr], ptr @g1, i32 0, i32 6), align 8
   tail call void @f1()
   %v0 = load ptr, ptr @g1, align 8
   tail call void @llvm.hexagon.Y5.l2fetch(ptr %v0, i64 -9223372036854775808)

diff  --git a/llvm/test/CodeGen/Mips/pr42736.ll b/llvm/test/CodeGen/Mips/pr42736.ll
index 1c8dc114a39846..a26f555e8481e8 100644
--- a/llvm/test/CodeGen/Mips/pr42736.ll
+++ b/llvm/test/CodeGen/Mips/pr42736.ll
@@ -20,7 +20,8 @@ entry:
 ; STATIC-NEXT: sd      $[[R0]]
 
   %val = alloca i64, align 8
-  store i64 and (i64 ptrtoint (ptr @foo to i64), i64 268435455), ptr %val, align 8
+  %and = and i64 ptrtoint (ptr @foo to i64), 268435455
+  store i64 %and, ptr %val, align 8
   %0 = load i64, ptr %val, align 8
   ret void
 }

diff  --git a/llvm/test/CodeGen/X86/2007-04-24-VectorCrash.ll b/llvm/test/CodeGen/X86/2007-04-24-VectorCrash.ll
index a4877fa2becf10..f8d8bac91d8bcc 100644
--- a/llvm/test/CodeGen/X86/2007-04-24-VectorCrash.ll
+++ b/llvm/test/CodeGen/X86/2007-04-24-VectorCrash.ll
@@ -6,7 +6,8 @@ declare <4 x float> @llvm.x86.sse.add.ss(<4 x float>, <4 x float>)
 
 define void @test(ptr %P) {
 entry:
-	or <4 x i32> zeroinitializer, and (<4 x i32> bitcast (<4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer) to <4 x i32>), <4 x i32> < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 >)		; <<4 x i32>>:0 [#uses=1]
+	%and = and <4 x i32> bitcast (<4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer) to <4 x i32>), < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 >
+	or <4 x i32> zeroinitializer, %and
 	bitcast <4 x i32> %0 to <4 x float>		; <<4 x float>>:1 [#uses=1]
 	fsub <4 x float> %1, zeroinitializer		; <<4 x float>>:2 [#uses=1]
 	fsub <4 x float> shufflevector (<4 x float> undef, <4 x float> undef, <4 x i32> zeroinitializer), %2		; <<4 x float>>:3 [#uses=1]

diff  --git a/llvm/test/CodeGen/X86/2012-03-20-LargeConstantExpr.ll b/llvm/test/CodeGen/X86/2012-03-20-LargeConstantExpr.ll
index 7e8e0a5cf64c29..ce566ea09b70b6 100644
--- a/llvm/test/CodeGen/X86/2012-03-20-LargeConstantExpr.ll
+++ b/llvm/test/CodeGen/X86/2012-03-20-LargeConstantExpr.ll
@@ -7,7 +7,7 @@ target triple = "x86_64-apple-macosx10.8.0"
 ; CHECK-NEXT: .quad   4575657222473777152
 ; CHECK-NEXT: .quad   4575657222473777152
 
- at .memset_pattern = internal unnamed_addr constant i128 or (i128 zext (i64 bitcast (<2 x float> <float 1.000000e+00, float 1.000000e+00> to i64) to i128), i128 shl (i128 zext (i64 bitcast (<2 x float> <float 1.000000e+00, float 1.000000e+00> to i64) to i128), i128 64)), align 16
+ at .memset_pattern = internal unnamed_addr constant i128 add (i128 zext (i64 bitcast (<2 x float> <float 1.000000e+00, float 1.000000e+00> to i64) to i128), i128 shl (i128 zext (i64 bitcast (<2 x float> <float 1.000000e+00, float 1.000000e+00> to i64) to i128), i128 64)), align 16
 
 define void @foo(ptr %a, i64 %b) {
   call void @memset_pattern16(ptr %a, ptr @.memset_pattern, i64 %b)

diff  --git a/llvm/test/CodeGen/X86/address-type-promotion-constantexpr.ll b/llvm/test/CodeGen/X86/address-type-promotion-constantexpr.ll
index d725c8b3ab6afa..9b6b482bc9cf91 100644
--- a/llvm/test/CodeGen/X86/address-type-promotion-constantexpr.ll
+++ b/llvm/test/CodeGen/X86/address-type-promotion-constantexpr.ll
@@ -10,7 +10,10 @@
 ; CHECK: xor %eax, %eax
 define i32 @main() {
 entry:
-  %foo = load i8, ptr getelementptr ([2 x i8], ptr @b, i64 0, i64 sext (i8 or (i8 zext (i1 icmp eq (ptr getelementptr inbounds ([2 x i32], ptr @c, i64 0, i64 1), ptr @a) to i8), i8 1) to i64)), align 1
+  %or = or i8 zext (i1 icmp eq (ptr getelementptr inbounds ([2 x i32], ptr @c, i64 0, i64 1), ptr @a) to i8), 1
+  %sext = sext i8 %or to i64
+  %gep = getelementptr [2 x i8], ptr @b, i64 0, i64 %sext
+  %foo = load i8, ptr %gep, align 1
   ret i32 0
 }
 

diff  --git a/llvm/test/CodeGen/X86/br-fold.ll b/llvm/test/CodeGen/X86/br-fold.ll
index 8361120de8be77..fb37d0d4a49aa7 100644
--- a/llvm/test/CodeGen/X86/br-fold.ll
+++ b/llvm/test/CodeGen/X86/br-fold.ll
@@ -8,15 +8,15 @@
 ; X64_DARWIN-NEXT: ud2
 
 ; X64_LINUX: orq _ZN11xercesc_2_56XMLUni16fgNotationStringE at GOTPCREL(%rip), %rax
-; X64_LINUX-NEXT: jne
-; X64_LINUX-NEXT: %bb8.i329
+; X64_LINUX-NEXT: je
+; X64_LINUX-NEXT: %bb4.i.i318.preheader
 
 ; X64_WINDOWS: orq %rax, %rcx
-; X64_WINDOWS-NEXT: jne
+; X64_WINDOWS-NEXT: je
 
 ; X64_WINDOWS_GNU: movq .refptr._ZN11xercesc_2_513SchemaSymbols21fgURI_SCHEMAFORSCHEMAE(%rip), %rax
 ; X64_WINDOWS_GNU: orq .refptr._ZN11xercesc_2_56XMLUni16fgNotationStringE(%rip), %rax
-; X64_WINDOWS_GNU-NEXT: jne
+; X64_WINDOWS_GNU-NEXT: je
 
 ; PS4: orq _ZN11xercesc_2_56XMLUni16fgNotationStringE at GOTPCREL(%rip), %rax
 ; PS4-NEXT: ud2
@@ -26,9 +26,9 @@
 
 define fastcc void @foo() {
 entry:
-  br i1 icmp eq (i64 or (i64 ptrtoint (ptr @_ZN11xercesc_2_513SchemaSymbols21fgURI_SCHEMAFORSCHEMAE to i64),
-                         i64 ptrtoint (ptr @_ZN11xercesc_2_56XMLUni16fgNotationStringE to i64)), i64 0),
-     label %bb8.i329, label %bb4.i.i318.preheader
+  %or = or i64 ptrtoint (ptr @_ZN11xercesc_2_513SchemaSymbols21fgURI_SCHEMAFORSCHEMAE to i64), ptrtoint (ptr @_ZN11xercesc_2_56XMLUni16fgNotationStringE to i64)
+  %cmp = icmp eq i64 %or, 0
+  br i1 %cmp, label %bb8.i329, label %bb4.i.i318.preheader
 
 bb4.i.i318.preheader:                             ; preds = %bb6
   unreachable

diff  --git a/llvm/test/CodeGen/X86/pre-coalesce-2.ll b/llvm/test/CodeGen/X86/pre-coalesce-2.ll
index 00d3a66d3eb3d8..67d57408c9c2d5 100644
--- a/llvm/test/CodeGen/X86/pre-coalesce-2.ll
+++ b/llvm/test/CodeGen/X86/pre-coalesce-2.ll
@@ -182,7 +182,10 @@ cleanup:                                          ; preds = %while.body
   br i1 %62, label %63, label %66
 
 ; <label>:63:                                     ; preds = %cleanup
-  %64 = icmp sge i8 trunc (i64 add (i64 and (i64 ptrtoint (ptr @b to i64), i64 7), i64 3) to i8), %61
+  %and = and i64 ptrtoint (ptr @b to i64), 7
+  %add = add i64 %and, 3
+  %trunc = trunc i64 %add to i8
+  %64 = icmp sge i8 %trunc, %61
   br i1 %64, label %65, label %66
 
 ; <label>:65:                                     ; preds = %63

diff  --git a/llvm/test/CodeGen/X86/tailcall-returndup-void.ll b/llvm/test/CodeGen/X86/tailcall-returndup-void.ll
index 5aa0db8c19961b..7110308c602cb6 100644
--- a/llvm/test/CodeGen/X86/tailcall-returndup-void.ll
+++ b/llvm/test/CodeGen/X86/tailcall-returndup-void.ll
@@ -13,7 +13,9 @@ c263:
   br i1 %ln268, label %c26a, label %n26p
 
 n26p:                                             ; preds = %c263
-  br i1 icmp ne (i64 and (i64 ptrtoint (ptr @sES_closure to i64), i64 7), i64 0), label %c1ZP.i, label %n1ZQ.i
+  %and = and i64 ptrtoint (ptr @sES_closure to i64), 7
+  %cmp = icmp ne i64 %and, 0
+  br i1 %cmp, label %c1ZP.i, label %n1ZQ.i
 
 n1ZQ.i:                                           ; preds = %n26p
   %ln1ZT.i = load i64, ptr @sES_closure, align 8

diff  --git a/llvm/test/CodeGen/X86/x86-64-tls-1.ll b/llvm/test/CodeGen/X86/x86-64-tls-1.ll
index dadab38f2dd2b9..b786f41cce3099 100644
--- a/llvm/test/CodeGen/X86/x86-64-tls-1.ll
+++ b/llvm/test/CodeGen/X86/x86-64-tls-1.ll
@@ -5,5 +5,6 @@ define i64 @z() nounwind {
 ; CHECK-NEXT: addl    %fs:0, %e[[R0]]x
 ; CHECK-NEXT: andl    $100, %e[[R0]]x
 
-  ret i64 and (i64 ptrtoint (ptr @tm_nest_level to i64), i64 100)
+  %and = and i64 ptrtoint (ptr @tm_nest_level to i64), 100
+  ret i64 %and
 }

diff  --git a/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir b/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
index 88cef41ebb9b88..1bfec58b6154ed 100644
--- a/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
+++ b/llvm/test/DebugInfo/MIR/X86/kill-after-spill.mir
@@ -57,7 +57,9 @@
     %6 = load i32, i32* %variableLocal11, align 8
     %variableLocal2 = getelementptr inbounds %struct.firstStruct, %struct.firstStruct* %5, i64 0, i32 1
     %7 = load i8, i8* %variableLocal2, align 4
-    tail call void @func3(i32 %6, i8 zeroext %7, i8 zeroext 5, i8* inttoptr (i64 or (i64 ptrtoint ([7 x i8]* @.str to i64), i64 -92238) to i8*), i32 %variable2)
+    %or = or i64 ptrtoint ([7 x i8]* @.str to i64), -92238
+    %ptr = inttoptr i64 %or to i8*
+    tail call void @func3(i32 %6, i8 zeroext %7, i8 zeroext 5, i8* %ptr, i32 %variable2)
     br label %cleanup
 
   private.exit:                                     ; preds = %if.end

diff  --git a/llvm/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll b/llvm/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll
index e8a7a5a1185c85..2e70a95dfde623 100644
--- a/llvm/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll
+++ b/llvm/test/Transforms/InstCombine/2004-11-27-SetCCForCastLargerAndConstant.ll
@@ -30,12 +30,12 @@ define i1 @lt_signed_to_large_unsigned(i8 %SB) {
 
 define i1 @PR28011(i16 %a) {
 ; CHECK-LABEL: @PR28011(
-; CHECK-NEXT:    [[CONV:%.*]] = sext i16 [[A:%.*]] to i32
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i32 [[CONV]], or (i32 zext (i1 icmp ne (ptr @b, ptr @a) to i32), i32 1)
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i16 [[A:%.*]], 1
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %conv = sext i16 %a to i32
-  %cmp = icmp ne i32 %conv, or (i32 zext (i1 icmp ne (ptr @b, ptr @a) to i32), i32 1)
+  %or = or i32 zext (i1 icmp ne (ptr @b, ptr @a) to i32), 1
+  %cmp = icmp ne i32 %conv, %or
   ret i1 %cmp
 }
 

diff  --git a/llvm/test/Transforms/InstCombine/2012-3-15-or-xor-constant.ll b/llvm/test/Transforms/InstCombine/2012-3-15-or-xor-constant.ll
index 3d3cccc2052916..bf288064271d74 100644
--- a/llvm/test/Transforms/InstCombine/2012-3-15-or-xor-constant.ll
+++ b/llvm/test/Transforms/InstCombine/2012-3-15-or-xor-constant.ll
@@ -1,12 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
 ; RUN: opt < %s -passes=instcombine -S | FileCheck %s
 ; PR12234
 
 @g = extern_weak global i32
 define i32 @function(i32 %x) nounwind {
+; CHECK-LABEL: define i32 @function
+; CHECK-SAME: (i32 [[X:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[XOR:%.*]] = xor i32 [[X]], 1
+; CHECK-NEXT:    store volatile i32 [[XOR]], ptr inttoptr (i64 1 to ptr), align 4
+; CHECK-NEXT:    [[OR4:%.*]] = or i32 [[X]], 1
+; CHECK-NEXT:    ret i32 [[OR4]]
+;
 entry:
   %xor = xor i32 %x, 1
   store volatile i32 %xor, ptr inttoptr (i64 1 to ptr), align 4
-  %or4 = or i32 or (i32 zext (i1 icmp eq (ptr @g, ptr null) to i32), i32 1), %xor
+  %or = or i32 zext (i1 icmp eq (ptr @g, ptr null) to i32), 1
+  %or4 = or i32 %or, %xor
   ret i32 %or4
 }
-; CHECK-LABEL: define i32 @function(

diff  --git a/llvm/test/Transforms/InstCombine/constant-expr-datalayout.ll b/llvm/test/Transforms/InstCombine/constant-expr-datalayout.ll
index 977404c6c57805..bdb210bd26d39c 100644
--- a/llvm/test/Transforms/InstCombine/constant-expr-datalayout.ll
+++ b/llvm/test/Transforms/InstCombine/constant-expr-datalayout.ll
@@ -11,7 +11,8 @@ define void @test1(ptr %ptr) {
 ; CHECK-NEXT:    store i64 0, ptr [[PTR:%.*]], align 8
 ; CHECK-NEXT:    ret void
 ;
-  store i64 and (i64 ptrtoint (ptr getelementptr (%test1.struct, ptr @test1.aligned_glbl, i32 0, i32 1) to i64), i64 3), ptr %ptr
+  %and = and i64 ptrtoint (ptr getelementptr (%test1.struct, ptr @test1.aligned_glbl, i32 0, i32 1) to i64), 3
+  store i64 %and, ptr %ptr
   ret void
 }
 

diff  --git a/llvm/test/Transforms/InstCombine/gepgep.ll b/llvm/test/Transforms/InstCombine/gepgep.ll
index f7fc89656a0184..6a492a7173cd2e 100644
--- a/llvm/test/Transforms/InstCombine/gepgep.ll
+++ b/llvm/test/Transforms/InstCombine/gepgep.ll
@@ -8,6 +8,6 @@ target triple = "x86_64-unknown-linux-gnu"
 declare void @use(ptr)
 
 define void @f() {
-  call void @use(ptr getelementptr (i8, ptr getelementptr (i8, ptr @buffer, i64 and (i64 sub (i64 0, i64 ptrtoint (ptr @buffer to i64)), i64 63)), i64 64))
+  call void @use(ptr getelementptr (i8, ptr getelementptr (i8, ptr @buffer, i64 add (i64 sub (i64 0, i64 ptrtoint (ptr @buffer to i64)), i64 63)), i64 64))
   ret void
 }

diff  --git a/llvm/test/Transforms/InstCombine/icmp-mul.ll b/llvm/test/Transforms/InstCombine/icmp-mul.ll
index 4268bbba416f01..262aafc1e929c6 100644
--- a/llvm/test/Transforms/InstCombine/icmp-mul.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-mul.ll
@@ -797,12 +797,13 @@ define <2 x i1> @eq_mul_constants_with_tz_splat(<2 x i32> %x, <2 x i32> %y) {
 
 define i1 @oss_fuzz_39934(i32 %arg) {
 ; CHECK-LABEL: @oss_fuzz_39934(
-; CHECK-NEXT:    [[B13:%.*]] = mul nsw i32 [[ARG:%.*]], -65536
-; CHECK-NEXT:    [[C10:%.*]] = icmp ne i32 [[B13]], mul (i32 or (i32 zext (i1 icmp eq (ptr @g, ptr null) to i32), i32 65537), i32 -65536)
+; CHECK-NEXT:    [[C10:%.*]] = icmp ne i32 [[ARG:%.*]], 1
 ; CHECK-NEXT:    ret i1 [[C10]]
 ;
   %B13 = mul nsw i32 %arg, -65536
-  %C10 = icmp ne i32 mul (i32 or (i32 zext (i1 icmp eq (ptr @g, ptr null) to i32), i32 65537), i32 -65536), %B13
+  %or = or i32 zext (i1 icmp eq (ptr @g, ptr null) to i32), 65537
+  %mul = mul i32 %or, -65536
+  %C10 = icmp ne i32 %mul, %B13
   ret i1 %C10
 }
 

diff  --git a/llvm/test/Transforms/InstCombine/not-add.ll b/llvm/test/Transforms/InstCombine/not-add.ll
index 43d269f0ecc07d..c14410b5008fe7 100644
--- a/llvm/test/Transforms/InstCombine/not-add.ll
+++ b/llvm/test/Transforms/InstCombine/not-add.ll
@@ -175,7 +175,8 @@ define void @pr50370(i32 %x) {
 ;
 entry:
   %xor = xor i32 %x, 1
-  %or4 = or i32 or (i32 zext (i1 icmp eq (ptr @g, ptr null) to i32), i32 1), 65536
+  %or = or i32 zext (i1 icmp eq (ptr @g, ptr null) to i32), 1
+  %or4 = or i32 %or, 65536
   %B6 = ashr i32 65536, %or4
   %B15 = srem i32 %B6, %xor
   %B20 = sdiv i32 %or4, 2147483647

diff  --git a/llvm/test/Transforms/LICM/pr23608.ll b/llvm/test/Transforms/LICM/pr23608.ll
index 4390e02ea05d84..1a40c505349d04 100644
--- a/llvm/test/Transforms/LICM/pr23608.ll
+++ b/llvm/test/Transforms/LICM/pr23608.ll
@@ -41,8 +41,6 @@ define void @fn1() {
 ; USE_ASSUME-NEXT:    br label [[INDIRECTGOTO:%.*]]
 ; USE_ASSUME:       while.cond:
 ; USE_ASSUME-NEXT:    [[TMP:%.*]] = load ptr, ptr @a, align 8
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr inttoptr (i64 and (i64 ptrtoint (ptr @a to i64), i64 -70368744177665) to ptr), i64 8), "nonnull"(ptr inttoptr (i64 and (i64 ptrtoint (ptr @a to i64), i64 -70368744177665) to ptr)), "align"(ptr inttoptr (i64 and (i64 ptrtoint (ptr @a to i64), i64 -70368744177665) to ptr), i64 8) ]
-; USE_ASSUME-NEXT:    call void @llvm.assume(i1 true) [ "dereferenceable"(ptr inttoptr (i64 add (i64 and (i64 ptrtoint (ptr @a to i64), i64 -70368744177665), i64 35184372088832) to ptr), i64 4), "nonnull"(ptr inttoptr (i64 add (i64 and (i64 ptrtoint (ptr @a to i64), i64 -70368744177665), i64 35184372088832) to ptr)), "align"(ptr inttoptr (i64 add (i64 and (i64 ptrtoint (ptr @a to i64), i64 -70368744177665), i64 35184372088832) to ptr), i64 8) ]
 ; USE_ASSUME-NEXT:    br label [[BB2:%.*]]
 ; USE_ASSUME:       bb:
 ; USE_ASSUME-NEXT:    call void @__msan_warning_noreturn()
@@ -69,8 +67,12 @@ entry:
 
 while.cond:                                       ; preds = %indirectgoto, %bb15
   %tmp = load ptr, ptr @a, align 8
-  %_msld = load i64, ptr inttoptr (i64 and (i64 ptrtoint (ptr @a to i64), i64 -70368744177665) to ptr), align 8
-  %tmp1 = load i32, ptr inttoptr (i64 add (i64 and (i64 ptrtoint (ptr @a to i64), i64 -70368744177665), i64 35184372088832) to ptr), align 8
+  %and = and i64 ptrtoint (ptr @a to i64), -70368744177665
+  %itop = inttoptr i64 %and to ptr
+  %_msld = load i64, ptr %itop, align 8
+  %add = add i64 %and, 35184372088832
+  %itop2 = inttoptr i64 %add to ptr
+  %tmp1 = load i32, ptr %itop2, align 8
   br label %bb2
 
 bb:                                               ; preds = %while.cond

diff  --git a/llvm/test/Transforms/LoopIdiom/basic.ll b/llvm/test/Transforms/LoopIdiom/basic.ll
index 880f96d19f991f..87247aa76cfc89 100644
--- a/llvm/test/Transforms/LoopIdiom/basic.ll
+++ b/llvm/test/Transforms/LoopIdiom/basic.ll
@@ -1594,7 +1594,9 @@ define noalias ptr @_ZN8CMSPULog9beginImplEja(ptr nocapture writeonly %0) local_
 ; CHECK-NEXT:    [[TMP4]] = add nuw nsw i32 [[TMP3]], 1
 ; CHECK-NEXT:    [[TMP5:%.*]] = zext i32 [[TMP3]] to i64
 ; CHECK-NEXT:    [[TMP6:%.*]] = getelementptr [[CLASS_CMSPULOG:%.*]], ptr [[TMP0:%.*]], i64 0, i32 8, i64 [[TMP5]]
-; CHECK-NEXT:    store i32 trunc (i64 and (i64 ptrtoint (ptr @G to i64), i64 16777215) to i32), ptr [[TMP6]], align 4
+; CHECK-NEXT:    [[AND:%.*]] = and i64 ptrtoint (ptr @G to i64), 16777215
+; CHECK-NEXT:    [[TRUNC:%.*]] = trunc i64 [[AND]] to i32
+; CHECK-NEXT:    store i32 [[TRUNC]], ptr [[TMP6]], align 4
 ; CHECK-NEXT:    [[TMP7:%.*]] = icmp ult i32 [[TMP3]], 511
 ; CHECK-NEXT:    br i1 [[TMP7]], label [[TMP2]], label [[TMP8:%.*]]
 ; CHECK:       8:
@@ -1607,7 +1609,9 @@ define noalias ptr @_ZN8CMSPULog9beginImplEja(ptr nocapture writeonly %0) local_
   %4 = add nuw nsw i32 %3, 1
   %5 = zext i32 %3 to i64
   %6 = getelementptr %class.CMSPULog, ptr %0, i64 0, i32 8, i64 %5
-  store i32 trunc (i64 and (i64 ptrtoint (ptr @G to i64), i64 16777215) to i32), ptr %6, align 4
+  %and = and i64 ptrtoint (ptr @G to i64), 16777215
+  %trunc = trunc i64 %and to i32
+  store i32 %trunc, ptr %6, align 4
   %7 = icmp ult i32 %3, 511
   br i1 %7, label %2, label %8
 

diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll b/llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
index 91a920b27e73c2..e1de16ffbd1868 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
@@ -523,14 +523,18 @@ define void @PR39538(ptr %t0, ptr %t1) {
 
 define void @load_combine_constant_expression(ptr %t1) {
 ; CHECK-LABEL: @load_combine_constant_expression(
-; CHECK-NEXT:    store i64 or (i64 shl (i64 zext (i32 ptrtoint (ptr @g1 to i32) to i64), i64 32), i64 zext (i32 ptrtoint (ptr @g2 to i32) to i64)), ptr [[T1:%.*]], align 4
+; CHECK-NEXT:    [[OR1:%.*]] = or i64 shl (i64 zext (i32 ptrtoint (ptr @g1 to i32) to i64), i64 32), zext (i32 ptrtoint (ptr @g2 to i32) to i64)
+; CHECK-NEXT:    store i64 [[OR1]], ptr [[T1:%.*]], align 4
 ; CHECK-NEXT:    [[T3:%.*]] = getelementptr i64, ptr [[T1]], i64 1
-; CHECK-NEXT:    store i64 or (i64 shl (i64 zext (i32 ptrtoint (ptr @g1 to i32) to i64), i64 32), i64 zext (i32 ptrtoint (ptr @g2 to i32) to i64)), ptr [[T3]], align 4
+; CHECK-NEXT:    [[OR2:%.*]] = or i64 shl (i64 zext (i32 ptrtoint (ptr @g1 to i32) to i64), i64 32), zext (i32 ptrtoint (ptr @g2 to i32) to i64)
+; CHECK-NEXT:    store i64 [[OR2]], ptr [[T3]], align 4
 ; CHECK-NEXT:    ret void
 ;
-  store i64 or (i64 shl (i64 zext (i32 ptrtoint (ptr @g1 to i32) to i64), i64 32), i64 zext (i32 ptrtoint (ptr @g2 to i32) to i64)), ptr %t1, align 4
+  %or1 = or i64 shl (i64 zext (i32 ptrtoint (ptr @g1 to i32) to i64), i64 32), zext (i32 ptrtoint (ptr @g2 to i32) to i64)
+  store i64 %or1, ptr %t1, align 4
   %t3 = getelementptr i64, ptr %t1, i64 1
-  store i64 or (i64 shl (i64 zext (i32 ptrtoint (ptr @g1 to i32) to i64), i64 32), i64 zext (i32 ptrtoint (ptr @g2 to i32) to i64)), ptr %t3, align 4
+  %or2 = or i64 shl (i64 zext (i32 ptrtoint (ptr @g1 to i32) to i64), i64 32), zext (i32 ptrtoint (ptr @g2 to i32) to i64)
+  store i64 %or2, ptr %t3, align 4
   ret void
 }
 

diff  --git a/llvm/test/Transforms/SimplifyCFG/PR9946.ll b/llvm/test/Transforms/SimplifyCFG/PR9946.ll
index 92a87c1e4ca501..d61c98704f883e 100644
--- a/llvm/test/Transforms/SimplifyCFG/PR9946.ll
+++ b/llvm/test/Transforms/SimplifyCFG/PR9946.ll
@@ -4,7 +4,9 @@
 
 define i32 @f() {
 entry:
-  br i1 icmp eq (i64 and (i64 ptrtoint (ptr @foo to i64), i64 15), i64 0), label %if.end, label %if.then
+  %and = and i64 ptrtoint (ptr @foo to i64), 15
+  %cmp = icmp eq i64 %and, 0
+  br i1 %cmp, label %if.end, label %if.then
 
 if.then:                                          ; preds = %entry
   br label %return


        


More information about the llvm-commits mailing list