[PATCH] D158355: [X86][CodeGen] Add a dag pattern to fix #64323

[Phoebe Wang via Phabricator via llvm-commits]

pengfei added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:21706-21708
     // Check if the result type doesn't match the inserted element type. A
     // SCALAR_TO_VECTOR may truncate the inserted element and the
     // EXTRACT_VECTOR_ELT may widen the extracted vector.
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The comments need update.


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:21714
+        return DAG.getNode(ISD::TRUNCATE, DL, ScalarVT, InOp);
+      else if (InOp.getValueType().bitsLE(ScalarVT))
+        return DAG.getNode(ISD::ANY_EXTEND, DL, ScalarVT, InOp);
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Do not use `else` when the previous condition ends with `return`.


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:21716
+        return DAG.getNode(ISD::ANY_EXTEND, DL, ScalarVT, InOp);
+      else
+        llvm_unreachable("Insert and extract types should have different bits");
----------------
ditto.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D158355/new/

https://reviews.llvm.org/D158355