[llvm] d8900f6 - [ARM] Fix abs overflow when encoding instructions like strb r1, [r0], #-0

Fangrui Song via llvm-commits llvm-commits at lists.llvm.org
Fri Aug 18 13:36:34 PDT 2023


Author: Fangrui Song
Date: 2023-08-18T13:36:30-07:00
New Revision: d8900f661a6e451be0ca253df3065254008dd93a

URL: https://github.com/llvm/llvm-project/commit/d8900f661a6e451be0ca253df3065254008dd93a
DIFF: https://github.com/llvm/llvm-project/commit/d8900f661a6e451be0ca253df3065254008dd93a.diff

LOG: [ARM] Fix abs overflow when encoding instructions like strb r1, [r0], #-0

Tested by llvm/test/MC/ARM/basic-thumb2-instructions.s.
Caught by newer -fsanitize=signed-integer-overflow (D156821).

Added: 
    

Modified: 
    llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
index a35196c199a506..616dd6dba75486 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
@@ -1661,9 +1661,9 @@ getT2AddrModeImm8OffsetOpValue(const MCInst &MI, unsigned OpNum,
 
   // FIXME: Needs fixup support.
   unsigned Value = 0;
-  int32_t tmp = (int32_t)MO1.getImm();
-  if (tmp < 0)
-    tmp = abs(tmp);
+  auto tmp = static_cast<uint32_t>(MO1.getImm());
+  if (static_cast<int32_t>(tmp) < 0)
+    tmp = -tmp;
   else
     Value |= 256; // Set the ADD bit
   Value |= tmp & 255;


        


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