[llvm] 80ce7ce - [RISCV] Mention frm in addition to vxrm in the comments for RISCVInsertReadWriteCSR. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2023-08-18T12:42:20-07:00
New Revision: 80ce7ce9702eb9fd83c492320e857e549e4ab797

URL: https://github.com/llvm/llvm-project/commit/80ce7ce9702eb9fd83c492320e857e549e4ab797
DIFF: https://github.com/llvm/llvm-project/commit/80ce7ce9702eb9fd83c492320e857e549e4ab797.diff

LOG: [RISCV] Mention frm in addition to vxrm in the comments for RISCVInsertReadWriteCSR. NFC

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInsertReadWriteCSR.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVInsertReadWriteCSR.cpp b/llvm/lib/Target/RISCV/RISCVInsertReadWriteCSR.cpp
index cb08c6b4178561..7e14126f412cc3 100644
--- a/llvm/lib/Target/RISCV/RISCVInsertReadWriteCSR.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInsertReadWriteCSR.cpp
@@ -8,8 +8,10 @@
 // This file implements the machine function pass to insert read/write of CSR-s
 // of the RISC-V instructions.
 //
-// Currently the pass implements naive insertion of a write to vxrm before an
-// RVV fixed-point instruction.
+// Currently the pass implements:
+// -Naive insertion of a write to vxrm before an RVV fixed-point instruction.
+// -Writing and saving frm before an RVV floating-point instruction with a
+//  static rounding mode and restores the value after.
 //
 //===----------------------------------------------------------------------===//
 
@@ -57,7 +59,8 @@ INITIALIZE_PASS(RISCVInsertReadWriteCSR, DEBUG_TYPE,
                 RISCV_INSERT_READ_WRITE_CSR_NAME, false, false)
 
 // This function inserts a write to vxrm when encountering an RVV fixed-point
-// instruction.
+// instruction. This function also swaps frm and restores it when encountering
+// an RVV floating point instruction with a static rounding mode.
 bool RISCVInsertReadWriteCSR::emitWriteRoundingMode(MachineBasicBlock &MBB) {
   bool Changed = false;
   for (MachineInstr &MI : MBB) {