[PATCH] D158291: [PoC][WIP] Add an AArch64 specific pass for loop idiom recognition
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 18 09:46:16 PDT 2023
craig.topper added inline comments.
================
Comment at: llvm/include/llvm/IR/Intrinsics.td:2180
+def int_experimental_cttz_elts:
+ DefaultAttrsIntrinsic<[llvm_i32_ty],
----------------
I wonder if something like "find first nonzero element" would be better?
================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:7467
+ SDValue AllZero = DAG.getConstant(0, DL, OpVT);
+ OpVT = OpVT.changeVectorElementType(MVT::i1);
+ Op = DAG.getSetCC(DL, OpVT, Op, AllZero, ISD::SETNE);
----------------
changeVectorElementType doesn't work if the source type is an MVT and the resulting type is not an MVT. Probably better to use getVectorVT. There have been two recent bug fixes for something like this https://reviews.llvm.org/D157392 and 512a6c50e87c1956c028daf3317b07b3aa0e309f
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D158291/new/
https://reviews.llvm.org/D158291
More information about the llvm-commits
mailing list