[PATCH] D146953: [Xtensa] Support for address intrinsics.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm requested changes to this revision.
arsenm added a comment.
This revision now requires changes to proceed.
Herald added a subscriber: sstefan1.

Needs tests



================
Comment at: llvm/lib/Target/Xtensa/XtensaISelLowering.cpp:776-777
+  // should be able to do this too
+  assert((cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue() == 0) &&
+         "Return address can be determined only for current frame.");
+
----------------
return SDValue to hit a selection failure instead of asserting


================
Comment at: llvm/lib/Target/Xtensa/XtensaISelLowering.cpp:787
+  // live-in.
+  unsigned Reg = MF.addLiveIn(RA, getRegClassFor(VT));
+  return DAG.getCopyFromReg(DAG.getEntryNode(), SDLoc(Op), Reg, VT);
----------------
Register


================
Comment at: llvm/lib/Target/Xtensa/XtensaISelLowering.cpp:947-948
+  // check the depth
+  assert((cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue() == 0) &&
+         "Frame address can only be determined for current frame.");
+
----------------
Ditto


Repository:
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  https://reviews.llvm.org/D146953/new/

https://reviews.llvm.org/D146953