[llvm] f64eb69 - [RISCV][GISel] Swap lo/hi register names in legalizer tests.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 17 20:44:08 PDT 2023
Author: Craig Topper
Date: 2023-08-17T20:37:42-07:00
New Revision: f64eb69d962fb4e78961094354bd7a5d89471263
URL: https://github.com/llvm/llvm-project/commit/f64eb69d962fb4e78961094354bd7a5d89471263
DIFF: https://github.com/llvm/llvm-project/commit/f64eb69d962fb4e78961094354bd7a5d89471263.diff
LOG: [RISCV][GISel] Swap lo/hi register names in legalizer tests.
This makes "lo" refer to the least significant bits and "hi" refer
to the most significant bits.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D158228
Added:
Modified:
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-add.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-ashr.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-div.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-lshr.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-mul-ext.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-mul.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-rem.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-shl.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-sub.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-add.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-ashr.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-div.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-lshr.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-mul-ext.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-mul.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-rem.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-shl.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-sub.mir
llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-add.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-add.mir
index 59178822830d44..1ea423c3153044 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-add.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-add.mir
@@ -83,30 +83,30 @@ name: add_i48
body: |
bb.0.entry:
; CHECK-LABEL: name: add_i48
- ; CHECK: %xhi:_(s32) = COPY $x10
- ; CHECK-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-NEXT: %yhi:_(s32) = COPY $x12
- ; CHECK-NEXT: %ylo:_(s32) = COPY $x13
- ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO %xhi, %yhi
+ ; CHECK: %xlo:_(s32) = COPY $x10
+ ; CHECK-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-NEXT: %ylo:_(s32) = COPY $x12
+ ; CHECK-NEXT: %yhi:_(s32) = COPY $x13
+ ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO %xlo, %ylo
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UADDO1]], [[C]]
- ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE %xlo, %ylo, [[AND]]
+ ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE %xhi, %yhi, [[AND]]
; CHECK-NEXT: $x10 = COPY [[UADDO]](s32)
; CHECK-NEXT: $x11 = COPY [[UADDE]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s32) = COPY $x10
- %xlo:_(s32) = COPY $x11
- %yhi:_(s32) = COPY $x12
- %ylo:_(s32) = COPY $x13
- %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
- %y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
+ %xlo:_(s32) = COPY $x10
+ %xhi:_(s32) = COPY $x11
+ %ylo:_(s32) = COPY $x12
+ %yhi:_(s32) = COPY $x13
+ %x0:_(s64) = G_MERGE_VALUES %xlo(s32), %xhi(s32)
+ %y0:_(s64) = G_MERGE_VALUES %ylo(s32), %yhi(s32)
%x:_(s48) = G_TRUNC %x0(s64)
%y:_(s48) = G_TRUNC %y0(s64)
%z:_(s48) = G_ADD %x, %y
%z0:_(s64) = G_ANYEXT %z(s48)
- %zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
- $x10 = COPY %zhi(s32)
- $x11 = COPY %zlo(s32)
+ %zlo:_(s32), %zhi:_(s32) = G_UNMERGE_VALUES %z0(s64)
+ $x10 = COPY %zlo(s32)
+ $x11 = COPY %zhi(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -115,27 +115,27 @@ name: add_i64
body: |
bb.0.entry:
; CHECK-LABEL: name: add_i64
- ; CHECK: %hi1:_(s32) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
- ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
- ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO %hi1, %hi2
+ ; CHECK: %lo1:_(s32) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO %lo1, %lo2
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UADDO1]], [[C]]
- ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE %lo1, %lo2, [[AND]]
+ ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE %hi1, %hi2, [[AND]]
; CHECK-NEXT: $x10 = COPY [[UADDO]](s32)
; CHECK-NEXT: $x11 = COPY [[UADDE]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s32) = COPY $x10
- %lo1:_(s32) = COPY $x11
- %hi2:_(s32) = COPY $x12
- %lo2:_(s32) = COPY $x13
- %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
- %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %lo1:_(s32) = COPY $x10
+ %hi1:_(s32) = COPY $x11
+ %lo2:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %lo1(s32), %hi1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %lo2(s32), %hi2(s32)
%y:_(s64) = G_ADD %x1, %x2
- %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
- $x10 = COPY %hiy(s32)
- $x11 = COPY %loy(s32)
+ %loy:_(s32), %hiy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %loy(s32)
+ $x11 = COPY %hiy(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -144,36 +144,36 @@ name: add_i96
body: |
bb.0.entry:
; CHECK-LABEL: name: add_i96
- ; CHECK: %hi1:_(s32) = COPY $x10
+ ; CHECK: %lo1:_(s32) = COPY $x10
; CHECK-NEXT: %mid1:_(s32) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
; CHECK-NEXT: %mid2:_(s32) = COPY $x14
- ; CHECK-NEXT: %lo2:_(s32) = COPY $x15
- ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO %hi1, %hi2
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x15
+ ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO %lo1, %lo2
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UADDO1]], [[C]]
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s32), [[UADDE1:%[0-9]+]]:_(s32) = G_UADDE %mid1, %mid2, [[AND]]
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[UADDE1]], [[C1]]
- ; CHECK-NEXT: [[UADDE2:%[0-9]+]]:_(s32), [[UADDE3:%[0-9]+]]:_(s32) = G_UADDE %lo1, %lo2, [[AND1]]
+ ; CHECK-NEXT: [[UADDE2:%[0-9]+]]:_(s32), [[UADDE3:%[0-9]+]]:_(s32) = G_UADDE %hi1, %hi2, [[AND1]]
; CHECK-NEXT: $x10 = COPY [[UADDO]](s32)
; CHECK-NEXT: $x11 = COPY [[UADDE]](s32)
; CHECK-NEXT: $x12 = COPY [[UADDE2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s32) = COPY $x10
+ %lo1:_(s32) = COPY $x10
%mid1:_(s32) = COPY $x11
- %lo1:_(s32) = COPY $x12
- %hi2:_(s32) = COPY $x13
+ %hi1:_(s32) = COPY $x12
+ %lo2:_(s32) = COPY $x13
%mid2:_(s32) = COPY $x14
- %lo2:_(s32) = COPY $x15
- %x1:_(s96) = G_MERGE_VALUES %hi1(s32), %mid1(s32), %lo1(s32)
- %x2:_(s96) = G_MERGE_VALUES %hi2(s32), %mid2(s32), %lo2(s32)
+ %hi2:_(s32) = COPY $x15
+ %x1:_(s96) = G_MERGE_VALUES %lo1(s32), %mid1(s32), %hi1(s32)
+ %x2:_(s96) = G_MERGE_VALUES %lo2(s32), %mid2(s32), %hi2(s32)
%y:_(s96) = G_ADD %x1, %x2
- %hi:_(s32), %mid:_(s32), %lo:_(s32) = G_UNMERGE_VALUES %y(s96)
- $x10 = COPY %hi(s32)
+ %lo:_(s32), %mid:_(s32), %hi:_(s32) = G_UNMERGE_VALUES %y(s96)
+ $x10 = COPY %lo(s32)
$x11 = COPY %mid(s32)
- $x12 = COPY %lo(s32)
+ $x12 = COPY %hi(s32)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir
index d3dcd96f3dae89..d5c13f403a0dee 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-and.mir
@@ -83,28 +83,28 @@ name: and_i48
body: |
bb.0.entry:
; CHECK-LABEL: name: and_i48
- ; CHECK: %xhi:_(s32) = COPY $x10
- ; CHECK-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-NEXT: %yhi:_(s32) = COPY $x12
- ; CHECK-NEXT: %ylo:_(s32) = COPY $x13
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %xhi, %yhi
- ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %xlo, %ylo
+ ; CHECK: %xlo:_(s32) = COPY $x10
+ ; CHECK-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-NEXT: %ylo:_(s32) = COPY $x12
+ ; CHECK-NEXT: %yhi:_(s32) = COPY $x13
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %xlo, %ylo
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %xhi, %yhi
; CHECK-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-NEXT: $x11 = COPY [[AND1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s32) = COPY $x10
- %xlo:_(s32) = COPY $x11
- %yhi:_(s32) = COPY $x12
- %ylo:_(s32) = COPY $x13
- %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
- %y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
+ %xlo:_(s32) = COPY $x10
+ %xhi:_(s32) = COPY $x11
+ %ylo:_(s32) = COPY $x12
+ %yhi:_(s32) = COPY $x13
+ %x0:_(s64) = G_MERGE_VALUES %xlo(s32), %xhi(s32)
+ %y0:_(s64) = G_MERGE_VALUES %ylo(s32), %yhi(s32)
%x:_(s48) = G_TRUNC %x0(s64)
%y:_(s48) = G_TRUNC %y0(s64)
%z:_(s48) = G_AND %x, %y
%z0:_(s64) = G_ANYEXT %z(s48)
- %zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
- $x10 = COPY %zhi(s32)
- $x11 = COPY %zlo(s32)
+ %zlo:_(s32), %zhi:_(s32) = G_UNMERGE_VALUES %z0(s64)
+ $x10 = COPY %zlo(s32)
+ $x11 = COPY %zhi(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -113,25 +113,25 @@ name: and_i64
body: |
bb.0.entry:
; CHECK-LABEL: name: and_i64
- ; CHECK: %hi1:_(s32) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
- ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %hi1, %hi2
- ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %lo1, %lo2
+ ; CHECK: %lo1:_(s32) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %lo1, %lo2
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %hi1, %hi2
; CHECK-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-NEXT: $x11 = COPY [[AND1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s32) = COPY $x10
- %lo1:_(s32) = COPY $x11
- %hi2:_(s32) = COPY $x12
- %lo2:_(s32) = COPY $x13
- %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
- %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %lo1:_(s32) = COPY $x10
+ %hi1:_(s32) = COPY $x11
+ %lo2:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %lo1(s32), %hi1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %lo2(s32), %hi2(s32)
%y:_(s64) = G_AND %x1, %x2
- %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
- $x10 = COPY %hiy(s32)
- $x11 = COPY %loy(s32)
+ %loy:_(s32), %hiy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %loy(s32)
+ $x11 = COPY %hiy(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -140,32 +140,32 @@ name: and_i96
body: |
bb.0.entry:
; CHECK-LABEL: name: and_i96
- ; CHECK: %hi1:_(s32) = COPY $x10
+ ; CHECK: %lo1:_(s32) = COPY $x10
; CHECK-NEXT: %mid1:_(s32) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
; CHECK-NEXT: %mid2:_(s32) = COPY $x14
- ; CHECK-NEXT: %lo2:_(s32) = COPY $x15
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %hi1, %hi2
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x15
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %lo1, %lo2
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %mid1, %mid2
- ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND %lo1, %lo2
+ ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND %hi1, %hi2
; CHECK-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-NEXT: $x11 = COPY [[AND1]](s32)
; CHECK-NEXT: $x12 = COPY [[AND2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s32) = COPY $x10
+ %lo1:_(s32) = COPY $x10
%mid1:_(s32) = COPY $x11
- %lo1:_(s32) = COPY $x12
- %hi2:_(s32) = COPY $x13
+ %hi1:_(s32) = COPY $x12
+ %lo2:_(s32) = COPY $x13
%mid2:_(s32) = COPY $x14
- %lo2:_(s32) = COPY $x15
- %x1:_(s96) = G_MERGE_VALUES %hi1(s32), %mid1(s32), %lo1(s32)
- %x2:_(s96) = G_MERGE_VALUES %hi2(s32), %mid2(s32), %lo2(s32)
+ %hi2:_(s32) = COPY $x15
+ %x1:_(s96) = G_MERGE_VALUES %lo1(s32), %mid1(s32), %hi1(s32)
+ %x2:_(s96) = G_MERGE_VALUES %lo2(s32), %mid2(s32), %hi2(s32)
%y:_(s96) = G_AND %x1, %x2
- %hi:_(s32), %mid:_(s32), %lo:_(s32) = G_UNMERGE_VALUES %y(s96)
- $x10 = COPY %hi(s32)
+ %lo:_(s32), %mid:_(s32), %hi:_(s32) = G_UNMERGE_VALUES %y(s96)
+ $x10 = COPY %lo(s32)
$x11 = COPY %mid(s32)
- $x12 = COPY %lo(s32)
+ $x12 = COPY %hi(s32)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-ashr.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-ashr.mir
index 61e799d6474b7f..cd86db2e3988b6 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-ashr.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-ashr.mir
@@ -92,18 +92,18 @@ name: ashr_i48
body: |
bb.0.entry:
; CHECK-LABEL: name: ashr_i48
- ; CHECK: %xhi:_(s32) = COPY $x10
- ; CHECK-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-NEXT: %yhi:_(s32) = COPY $x12
- ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xlo, 16
+ ; CHECK: %xlo:_(s32) = COPY $x10
+ ; CHECK-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-NEXT: %ylo:_(s32) = COPY $x12
+ ; CHECK-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xhi, 16
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %yhi, [[C]]
- ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], %yhi
+ ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %ylo, [[C]]
+ ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], %ylo
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %yhi(s32), [[C]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %yhi(s32), [[C1]]
- ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SEXT_INREG]], %yhi(s32)
- ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %xhi, %yhi(s32)
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %ylo(s32), [[C]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %ylo(s32), [[C1]]
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SEXT_INREG]], %ylo(s32)
+ ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %xlo, %ylo(s32)
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[SEXT_INREG]], [[SUB1]](s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
@@ -114,26 +114,26 @@ body: |
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[OR]], [[ASHR2]]
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C4]]
- ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), %xhi, [[SELECT]]
+ ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), %xlo, [[SELECT]]
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ICMP]], [[C5]]
; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), [[ASHR]], [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[SELECT1]](s32)
; CHECK-NEXT: $x11 = COPY [[SELECT2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s32) = COPY $x10
- %xlo:_(s32) = COPY $x11
- %yhi:_(s32) = COPY $x12
- %ylo:_(s32) = COPY $x13
- %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
- %y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
+ %xlo:_(s32) = COPY $x10
+ %xhi:_(s32) = COPY $x11
+ %ylo:_(s32) = COPY $x12
+ %yhi:_(s32) = COPY $x13
+ %x0:_(s64) = G_MERGE_VALUES %xlo(s32), %xhi(s32)
+ %y0:_(s64) = G_MERGE_VALUES %ylo(s32), %yhi(s32)
%x:_(s48) = G_TRUNC %x0(s64)
%y:_(s48) = G_TRUNC %y0(s64)
%z:_(s48) = G_ASHR %x, %y
%z0:_(s64) = G_ANYEXT %z(s48)
- %zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
- $x10 = COPY %zhi(s32)
- $x11 = COPY %zlo(s32)
+ %zlo:_(s32), %zhi:_(s32) = G_UNMERGE_VALUES %z0(s64)
+ $x10 = COPY %zlo(s32)
+ $x11 = COPY %zhi(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -142,44 +142,44 @@ name: ashr_i64
body: |
bb.0.entry:
; CHECK-LABEL: name: ashr_i64
- ; CHECK: %hi1:_(s32) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
+ ; CHECK: %lo1:_(s32) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %hi2, [[C]]
- ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], %hi2
+ ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %lo2, [[C]]
+ ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], %lo2
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %hi2(s32), [[C]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %hi2(s32), [[C1]]
- ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR %lo1, %hi2(s32)
- ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %hi1, %hi2(s32)
- ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %lo1, [[SUB1]](s32)
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %lo2(s32), [[C]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %lo2(s32), [[C1]]
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR %hi1, %lo2(s32)
+ ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %lo1, %lo2(s32)
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %hi1, [[SUB1]](s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
- ; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR %lo1, [[C2]](s32)
- ; CHECK-NEXT: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR %lo1, [[SUB]](s32)
+ ; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR %hi1, [[C2]](s32)
+ ; CHECK-NEXT: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR %hi1, [[SUB]](s32)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP]], [[C3]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[OR]], [[ASHR2]]
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C4]]
- ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), %hi1, [[SELECT]]
+ ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), %lo1, [[SELECT]]
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ICMP]], [[C5]]
; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), [[ASHR]], [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[SELECT1]](s32)
; CHECK-NEXT: $x11 = COPY [[SELECT2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s32) = COPY $x10
- %lo1:_(s32) = COPY $x11
- %hi2:_(s32) = COPY $x12
- %lo2:_(s32) = COPY $x13
- %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
- %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %lo1:_(s32) = COPY $x10
+ %hi1:_(s32) = COPY $x11
+ %lo2:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %lo1(s32), %hi1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %lo2(s32), %hi2(s32)
%y:_(s64) = G_ASHR %x1, %x2
- %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
- $x10 = COPY %hiy(s32)
- $x11 = COPY %loy(s32)
+ %loy:_(s32), %hiy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %loy(s32)
+ $x11 = COPY %hiy(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -188,25 +188,25 @@ name: ashr_i96
body: |
bb.0.entry:
; CHECK-LABEL: name: ashr_i96
- ; CHECK: %hi1:_(s32) = COPY $x10
+ ; CHECK: %lo1:_(s32) = COPY $x10
; CHECK-NEXT: %mid1:_(s32) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
- ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR %lo1, [[C]](s32)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR %hi1, [[C]](s32)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 64
- ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %hi2, [[C1]]
- ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C1]], %hi2
+ ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %lo2, [[C1]]
+ ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C1]], %lo2
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %hi2(s32), [[C1]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %hi2(s32), [[C2]]
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %lo2(s32), [[C1]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %lo2(s32), [[C2]]
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; CHECK-NEXT: [[SUB2:%[0-9]+]]:_(s32) = G_SUB %hi2, [[C3]]
- ; CHECK-NEXT: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C3]], %hi2
+ ; CHECK-NEXT: [[SUB2:%[0-9]+]]:_(s32) = G_SUB %lo2, [[C3]]
+ ; CHECK-NEXT: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C3]], %lo2
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %hi2(s32), [[C3]]
- ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %hi2(s32), [[C4]]
- ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %lo1, %hi2(s32)
+ ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %lo2(s32), [[C3]]
+ ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %lo2(s32), [[C4]]
+ ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %hi1, %lo2(s32)
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[ASHR]], [[SUB3]](s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL]]
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[SUB2]](s32)
@@ -215,15 +215,15 @@ body: |
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[OR]], [[ASHR1]]
; CHECK-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ICMP3]], [[C6]]
- ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), %lo1, [[SELECT]]
+ ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), %hi1, [[SELECT]]
; CHECK-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; CHECK-NEXT: [[SUB4:%[0-9]+]]:_(s32) = G_SUB %hi2, [[C7]]
- ; CHECK-NEXT: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C7]], %hi2
+ ; CHECK-NEXT: [[SUB4:%[0-9]+]]:_(s32) = G_SUB %lo2, [[C7]]
+ ; CHECK-NEXT: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C7]], %lo2
; CHECK-NEXT: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %hi2(s32), [[C7]]
- ; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %hi2(s32), [[C8]]
- ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR %mid1, %hi2(s32)
- ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR %hi1, %hi2(s32)
+ ; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %lo2(s32), [[C7]]
+ ; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %lo2(s32), [[C8]]
+ ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR %mid1, %lo2(s32)
+ ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR %lo1, %lo2(s32)
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL %mid1, [[SUB5]](s32)
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[LSHR2]], [[SHL1]]
; CHECK-NEXT: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
@@ -233,7 +233,7 @@ body: |
; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), [[OR1]], [[LSHR3]]
; CHECK-NEXT: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[ICMP5]], [[C11]]
- ; CHECK-NEXT: [[SELECT3:%[0-9]+]]:_(s32) = G_SELECT [[AND3]](s32), %hi1, [[SELECT2]]
+ ; CHECK-NEXT: [[SELECT3:%[0-9]+]]:_(s32) = G_SELECT [[AND3]](s32), %lo1, [[SELECT2]]
; CHECK-NEXT: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s32) = G_AND [[ICMP4]], [[C12]]
; CHECK-NEXT: [[SELECT4:%[0-9]+]]:_(s32) = G_SELECT [[AND4]](s32), [[LSHR1]], [[C9]]
@@ -243,12 +243,12 @@ body: |
; CHECK-NEXT: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[ICMP6:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[SUB1]](s32), [[C13]]
; CHECK-NEXT: [[ICMP7:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[SUB1]](s32), [[C14]]
- ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL %lo1, [[SUB1]](s32)
- ; CHECK-NEXT: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR %lo1, [[SUB7]](s32)
+ ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL %hi1, [[SUB1]](s32)
+ ; CHECK-NEXT: [[LSHR4:%[0-9]+]]:_(s32) = G_LSHR %hi1, [[SUB7]](s32)
; CHECK-NEXT: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[ASHR]], [[SUB1]](s32)
; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[LSHR4]], [[SHL3]]
; CHECK-NEXT: [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s32) = G_SHL %lo1, [[SUB6]](s32)
+ ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s32) = G_SHL %hi1, [[SUB6]](s32)
; CHECK-NEXT: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s32) = G_AND [[ICMP6]], [[C16]]
; CHECK-NEXT: [[SELECT5:%[0-9]+]]:_(s32) = G_SELECT [[AND5]](s32), [[SHL2]], [[C15]]
@@ -269,7 +269,7 @@ body: |
; CHECK-NEXT: [[ICMP8:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[SUB]](s32), [[C20]]
; CHECK-NEXT: [[ICMP9:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[SUB]](s32), [[C21]]
; CHECK-NEXT: [[ASHR3:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[SUB]](s32)
- ; CHECK-NEXT: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR %lo1, [[SUB]](s32)
+ ; CHECK-NEXT: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR %hi1, [[SUB]](s32)
; CHECK-NEXT: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[ASHR]], [[SUB9]](s32)
; CHECK-NEXT: [[OR5:%[0-9]+]]:_(s32) = G_OR [[LSHR5]], [[SHL5]]
; CHECK-NEXT: [[C22:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
@@ -280,7 +280,7 @@ body: |
; CHECK-NEXT: [[SELECT8:%[0-9]+]]:_(s32) = G_SELECT [[AND8]](s32), [[OR5]], [[ASHR5]]
; CHECK-NEXT: [[C24:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND9:%[0-9]+]]:_(s32) = G_AND [[ICMP9]], [[C24]]
- ; CHECK-NEXT: [[SELECT9:%[0-9]+]]:_(s32) = G_SELECT [[AND9]](s32), %lo1, [[SELECT8]]
+ ; CHECK-NEXT: [[SELECT9:%[0-9]+]]:_(s32) = G_SELECT [[AND9]](s32), %hi1, [[SELECT8]]
; CHECK-NEXT: [[C25:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND10:%[0-9]+]]:_(s32) = G_AND [[ICMP8]], [[C25]]
; CHECK-NEXT: [[SELECT10:%[0-9]+]]:_(s32) = G_SELECT [[AND10]](s32), [[ASHR3]], [[ASHR4]]
@@ -292,7 +292,7 @@ body: |
; CHECK-NEXT: [[SELECT12:%[0-9]+]]:_(s32) = G_SELECT [[AND12]](s32), [[OR4]], [[SELECT10]]
; CHECK-NEXT: [[C28:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND13:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C28]]
- ; CHECK-NEXT: [[SELECT13:%[0-9]+]]:_(s32) = G_SELECT [[AND13]](s32), %hi1, [[SELECT11]]
+ ; CHECK-NEXT: [[SELECT13:%[0-9]+]]:_(s32) = G_SELECT [[AND13]](s32), %lo1, [[SELECT11]]
; CHECK-NEXT: [[C29:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND14:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C29]]
; CHECK-NEXT: [[SELECT14:%[0-9]+]]:_(s32) = G_SELECT [[AND14]](s32), %mid1, [[SELECT12]]
@@ -303,19 +303,19 @@ body: |
; CHECK-NEXT: $x11 = COPY [[SELECT14]](s32)
; CHECK-NEXT: $x12 = COPY [[SELECT15]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s32) = COPY $x10
+ %lo1:_(s32) = COPY $x10
%mid1:_(s32) = COPY $x11
- %lo1:_(s32) = COPY $x12
- %hi2:_(s32) = COPY $x13
+ %hi1:_(s32) = COPY $x12
+ %lo2:_(s32) = COPY $x13
%mid2:_(s32) = COPY $x14
- %lo2:_(s32) = COPY $x15
- %x1:_(s96) = G_MERGE_VALUES %hi1(s32), %mid1(s32), %lo1(s32)
- %x2:_(s96) = G_MERGE_VALUES %hi2(s32), %mid2(s32), %lo2(s32)
+ %hi2:_(s32) = COPY $x15
+ %x1:_(s96) = G_MERGE_VALUES %lo1(s32), %mid1(s32), %hi1(s32)
+ %x2:_(s96) = G_MERGE_VALUES %lo2(s32), %mid2(s32), %hi2(s32)
%y:_(s96) = G_ASHR %x1, %x2
- %hi:_(s32), %mid:_(s32), %lo:_(s32) = G_UNMERGE_VALUES %y(s96)
- $x10 = COPY %hi(s32)
+ %lo:_(s32), %mid:_(s32), %hi:_(s32) = G_UNMERGE_VALUES %y(s96)
+ $x10 = COPY %lo(s32)
$x11 = COPY %mid(s32)
- $x12 = COPY %lo(s32)
+ $x12 = COPY %hi(s32)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-div.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-div.mir
index bc2ced0bc1c466..8753262a7b47d3 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-div.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-div.mir
@@ -137,15 +137,15 @@ name: sdiv_i48
body: |
bb.0.entry:
; CHECK-I-LABEL: name: sdiv_i48
- ; CHECK-I: %xhi:_(s32) = COPY $x10
- ; CHECK-I-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-I-NEXT: %yhi:_(s32) = COPY $x12
- ; CHECK-I-NEXT: %ylo:_(s32) = COPY $x13
- ; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xlo, 16
- ; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %ylo, 16
- ; CHECK-I-NEXT: $x10 = COPY %xhi(s32)
+ ; CHECK-I: %xlo:_(s32) = COPY $x10
+ ; CHECK-I-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-I-NEXT: %ylo:_(s32) = COPY $x12
+ ; CHECK-I-NEXT: %yhi:_(s32) = COPY $x13
+ ; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xhi, 16
+ ; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %yhi, 16
+ ; CHECK-I-NEXT: $x10 = COPY %xlo(s32)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG]](s32)
- ; CHECK-I-NEXT: $x12 = COPY %yhi(s32)
+ ; CHECK-I-NEXT: $x12 = COPY %ylo(s32)
; CHECK-I-NEXT: $x13 = COPY [[SEXT_INREG1]](s32)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
@@ -155,15 +155,15 @@ body: |
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
;
; CHECK-M-LABEL: name: sdiv_i48
- ; CHECK-M: %xhi:_(s32) = COPY $x10
- ; CHECK-M-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-M-NEXT: %yhi:_(s32) = COPY $x12
- ; CHECK-M-NEXT: %ylo:_(s32) = COPY $x13
- ; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xlo, 16
- ; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %ylo, 16
- ; CHECK-M-NEXT: $x10 = COPY %xhi(s32)
+ ; CHECK-M: %xlo:_(s32) = COPY $x10
+ ; CHECK-M-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-M-NEXT: %ylo:_(s32) = COPY $x12
+ ; CHECK-M-NEXT: %yhi:_(s32) = COPY $x13
+ ; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xhi, 16
+ ; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %yhi, 16
+ ; CHECK-M-NEXT: $x10 = COPY %xlo(s32)
; CHECK-M-NEXT: $x11 = COPY [[SEXT_INREG]](s32)
- ; CHECK-M-NEXT: $x12 = COPY %yhi(s32)
+ ; CHECK-M-NEXT: $x12 = COPY %ylo(s32)
; CHECK-M-NEXT: $x13 = COPY [[SEXT_INREG1]](s32)
; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
@@ -171,19 +171,19 @@ body: |
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s32)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s32) = COPY $x10
- %xlo:_(s32) = COPY $x11
- %yhi:_(s32) = COPY $x12
- %ylo:_(s32) = COPY $x13
- %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
- %y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
+ %xlo:_(s32) = COPY $x10
+ %xhi:_(s32) = COPY $x11
+ %ylo:_(s32) = COPY $x12
+ %yhi:_(s32) = COPY $x13
+ %x0:_(s64) = G_MERGE_VALUES %xlo(s32), %xhi(s32)
+ %y0:_(s64) = G_MERGE_VALUES %ylo(s32), %yhi(s32)
%x:_(s48) = G_TRUNC %x0
%y:_(s48) = G_TRUNC %y0
%z:_(s48) = G_SDIV %x, %y
%z0:_(s64) = G_ANYEXT %z
- %zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
- $x10 = COPY %zhi(s32)
- $x11 = COPY %zlo(s32)
+ %zlo:_(s32), %zhi:_(s32) = G_UNMERGE_VALUES %z0(s64)
+ $x10 = COPY %zlo(s32)
+ $x11 = COPY %zhi(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -192,14 +192,14 @@ name: sdiv_i64
body: |
bb.0.entry:
; CHECK-I-LABEL: name: sdiv_i64
- ; CHECK-I: %hi1:_(s32) = COPY $x10
- ; CHECK-I-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-I-NEXT: %hi2:_(s32) = COPY $x12
- ; CHECK-I-NEXT: %lo2:_(s32) = COPY $x13
- ; CHECK-I-NEXT: $x10 = COPY %hi1(s32)
- ; CHECK-I-NEXT: $x11 = COPY %lo1(s32)
- ; CHECK-I-NEXT: $x12 = COPY %hi2(s32)
- ; CHECK-I-NEXT: $x13 = COPY %lo2(s32)
+ ; CHECK-I: %lo1:_(s32) = COPY $x10
+ ; CHECK-I-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-I-NEXT: %lo2:_(s32) = COPY $x12
+ ; CHECK-I-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-I-NEXT: $x10 = COPY %lo1(s32)
+ ; CHECK-I-NEXT: $x11 = COPY %hi1(s32)
+ ; CHECK-I-NEXT: $x12 = COPY %lo2(s32)
+ ; CHECK-I-NEXT: $x13 = COPY %hi2(s32)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -208,30 +208,30 @@ body: |
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
;
; CHECK-M-LABEL: name: sdiv_i64
- ; CHECK-M: %hi1:_(s32) = COPY $x10
- ; CHECK-M-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-M-NEXT: %hi2:_(s32) = COPY $x12
- ; CHECK-M-NEXT: %lo2:_(s32) = COPY $x13
- ; CHECK-M-NEXT: $x10 = COPY %hi1(s32)
- ; CHECK-M-NEXT: $x11 = COPY %lo1(s32)
- ; CHECK-M-NEXT: $x12 = COPY %hi2(s32)
- ; CHECK-M-NEXT: $x13 = COPY %lo2(s32)
+ ; CHECK-M: %lo1:_(s32) = COPY $x10
+ ; CHECK-M-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-M-NEXT: %lo2:_(s32) = COPY $x12
+ ; CHECK-M-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-M-NEXT: $x10 = COPY %lo1(s32)
+ ; CHECK-M-NEXT: $x11 = COPY %hi1(s32)
+ ; CHECK-M-NEXT: $x12 = COPY %lo2(s32)
+ ; CHECK-M-NEXT: $x13 = COPY %hi2(s32)
; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__divdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s32)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s32) = COPY $x10
- %lo1:_(s32) = COPY $x11
- %hi2:_(s32) = COPY $x12
- %lo2:_(s32) = COPY $x13
- %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
- %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %lo1:_(s32) = COPY $x10
+ %hi1:_(s32) = COPY $x11
+ %lo2:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %lo1(s32), %hi1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %lo2(s32), %hi2(s32)
%y:_(s64) = G_SDIV %x1, %x2
- %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
- $x10 = COPY %hiy(s32)
- $x11 = COPY %loy(s32)
+ %loy:_(s32), %hiy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %loy(s32)
+ $x11 = COPY %hiy(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -381,18 +381,18 @@ name: udiv_i48
body: |
bb.0.entry:
; CHECK-I-LABEL: name: udiv_i48
- ; CHECK-I: %xhi:_(s32) = COPY $x10
- ; CHECK-I-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-I-NEXT: %yhi:_(s32) = COPY $x12
- ; CHECK-I-NEXT: %ylo:_(s32) = COPY $x13
+ ; CHECK-I: %xlo:_(s32) = COPY $x10
+ ; CHECK-I-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-I-NEXT: %ylo:_(s32) = COPY $x12
+ ; CHECK-I-NEXT: %yhi:_(s32) = COPY $x13
; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
- ; CHECK-I-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %xhi, [[C]]
- ; CHECK-I-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %xlo, [[C1]]
+ ; CHECK-I-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %xlo, [[C]]
+ ; CHECK-I-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %xhi, [[C1]]
; CHECK-I-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
; CHECK-I-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
- ; CHECK-I-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND %yhi, [[C2]]
- ; CHECK-I-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND %ylo, [[C3]]
+ ; CHECK-I-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND %ylo, [[C2]]
+ ; CHECK-I-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND %yhi, [[C3]]
; CHECK-I-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s32)
; CHECK-I-NEXT: $x12 = COPY [[AND2]](s32)
@@ -405,18 +405,18 @@ body: |
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
;
; CHECK-M-LABEL: name: udiv_i48
- ; CHECK-M: %xhi:_(s32) = COPY $x10
- ; CHECK-M-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-M-NEXT: %yhi:_(s32) = COPY $x12
- ; CHECK-M-NEXT: %ylo:_(s32) = COPY $x13
+ ; CHECK-M: %xlo:_(s32) = COPY $x10
+ ; CHECK-M-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-M-NEXT: %ylo:_(s32) = COPY $x12
+ ; CHECK-M-NEXT: %yhi:_(s32) = COPY $x13
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
- ; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %xhi, [[C]]
- ; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %xlo, [[C1]]
+ ; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %xlo, [[C]]
+ ; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %xhi, [[C1]]
; CHECK-M-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
; CHECK-M-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
- ; CHECK-M-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND %yhi, [[C2]]
- ; CHECK-M-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND %ylo, [[C3]]
+ ; CHECK-M-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND %ylo, [[C2]]
+ ; CHECK-M-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND %yhi, [[C3]]
; CHECK-M-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-M-NEXT: $x11 = COPY [[AND1]](s32)
; CHECK-M-NEXT: $x12 = COPY [[AND2]](s32)
@@ -427,19 +427,19 @@ body: |
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s32)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s32) = COPY $x10
- %xlo:_(s32) = COPY $x11
- %yhi:_(s32) = COPY $x12
- %ylo:_(s32) = COPY $x13
- %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
- %y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
+ %xlo:_(s32) = COPY $x10
+ %xhi:_(s32) = COPY $x11
+ %ylo:_(s32) = COPY $x12
+ %yhi:_(s32) = COPY $x13
+ %x0:_(s64) = G_MERGE_VALUES %xlo(s32), %xhi(s32)
+ %y0:_(s64) = G_MERGE_VALUES %ylo(s32), %yhi(s32)
%x:_(s48) = G_TRUNC %x0
%y:_(s48) = G_TRUNC %y0
%z:_(s48) = G_UDIV %x, %y
%z0:_(s64) = G_ANYEXT %z
- %zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
- $x10 = COPY %zhi(s32)
- $x11 = COPY %zlo(s32)
+ %zlo:_(s32), %zhi:_(s32) = G_UNMERGE_VALUES %z0(s64)
+ $x10 = COPY %zlo(s32)
+ $x11 = COPY %zhi(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -448,14 +448,14 @@ name: udiv_i64
body: |
bb.0.entry:
; CHECK-I-LABEL: name: udiv_i64
- ; CHECK-I: %hi1:_(s32) = COPY $x10
- ; CHECK-I-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-I-NEXT: %hi2:_(s32) = COPY $x12
- ; CHECK-I-NEXT: %lo2:_(s32) = COPY $x13
- ; CHECK-I-NEXT: $x10 = COPY %hi1(s32)
- ; CHECK-I-NEXT: $x11 = COPY %lo1(s32)
- ; CHECK-I-NEXT: $x12 = COPY %hi2(s32)
- ; CHECK-I-NEXT: $x13 = COPY %lo2(s32)
+ ; CHECK-I: %lo1:_(s32) = COPY $x10
+ ; CHECK-I-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-I-NEXT: %lo2:_(s32) = COPY $x12
+ ; CHECK-I-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-I-NEXT: $x10 = COPY %lo1(s32)
+ ; CHECK-I-NEXT: $x11 = COPY %hi1(s32)
+ ; CHECK-I-NEXT: $x12 = COPY %lo2(s32)
+ ; CHECK-I-NEXT: $x13 = COPY %hi2(s32)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -464,30 +464,30 @@ body: |
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
;
; CHECK-M-LABEL: name: udiv_i64
- ; CHECK-M: %hi1:_(s32) = COPY $x10
- ; CHECK-M-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-M-NEXT: %hi2:_(s32) = COPY $x12
- ; CHECK-M-NEXT: %lo2:_(s32) = COPY $x13
- ; CHECK-M-NEXT: $x10 = COPY %hi1(s32)
- ; CHECK-M-NEXT: $x11 = COPY %lo1(s32)
- ; CHECK-M-NEXT: $x12 = COPY %hi2(s32)
- ; CHECK-M-NEXT: $x13 = COPY %lo2(s32)
+ ; CHECK-M: %lo1:_(s32) = COPY $x10
+ ; CHECK-M-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-M-NEXT: %lo2:_(s32) = COPY $x12
+ ; CHECK-M-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-M-NEXT: $x10 = COPY %lo1(s32)
+ ; CHECK-M-NEXT: $x11 = COPY %hi1(s32)
+ ; CHECK-M-NEXT: $x12 = COPY %lo2(s32)
+ ; CHECK-M-NEXT: $x13 = COPY %hi2(s32)
; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__udivdi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s32)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s32) = COPY $x10
- %lo1:_(s32) = COPY $x11
- %hi2:_(s32) = COPY $x12
- %lo2:_(s32) = COPY $x13
- %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
- %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %lo1:_(s32) = COPY $x10
+ %hi1:_(s32) = COPY $x11
+ %lo2:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %lo1(s32), %hi1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %lo2(s32), %hi2(s32)
%y:_(s64) = G_UDIV %x1, %x2
- %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
- $x10 = COPY %hiy(s32)
- $x11 = COPY %loy(s32)
+ %loy:_(s32), %hiy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %loy(s32)
+ $x11 = COPY %hiy(s32)
PseudoRET implicit $x10, implicit $x11
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-lshr.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-lshr.mir
index bfaafea12b8e9b..da6fb7802bd420 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-lshr.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-lshr.mir
@@ -95,21 +95,21 @@ name: lshr_i48
body: |
bb.0.entry:
; CHECK-LABEL: name: lshr_i48
- ; CHECK: %xhi:_(s32) = COPY $x10
- ; CHECK-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-NEXT: %yhi:_(s32) = COPY $x12
+ ; CHECK: %xlo:_(s32) = COPY $x10
+ ; CHECK-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-NEXT: %ylo:_(s32) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %xhi, [[C]]
- ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %xlo, [[C1]]
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %xlo, [[C]]
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %xhi, [[C1]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %yhi, [[C2]]
- ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C2]], %yhi
+ ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %ylo, [[C2]]
+ ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C2]], %ylo
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %yhi(s32), [[C2]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %yhi(s32), [[C3]]
- ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND1]], %yhi(s32)
- ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[AND]], %yhi(s32)
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %ylo(s32), [[C2]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %ylo(s32), [[C3]]
+ ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND1]], %ylo(s32)
+ ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[AND]], %ylo(s32)
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[SUB1]](s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR1]], [[SHL]]
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
@@ -126,19 +126,19 @@ body: |
; CHECK-NEXT: $x10 = COPY [[SELECT1]](s32)
; CHECK-NEXT: $x11 = COPY [[SELECT2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s32) = COPY $x10
- %xlo:_(s32) = COPY $x11
- %yhi:_(s32) = COPY $x12
- %ylo:_(s32) = COPY $x13
- %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
- %y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
+ %xlo:_(s32) = COPY $x10
+ %xhi:_(s32) = COPY $x11
+ %ylo:_(s32) = COPY $x12
+ %yhi:_(s32) = COPY $x13
+ %x0:_(s64) = G_MERGE_VALUES %xlo(s32), %xhi(s32)
+ %y0:_(s64) = G_MERGE_VALUES %ylo(s32), %yhi(s32)
%x:_(s48) = G_TRUNC %x0(s64)
%y:_(s48) = G_TRUNC %y0(s64)
%z:_(s48) = G_LSHR %x, %y
%z0:_(s64) = G_ANYEXT %z(s48)
- %zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
- $x10 = COPY %zhi(s32)
- $x11 = COPY %zlo(s32)
+ %zlo:_(s32), %zhi:_(s32) = G_UNMERGE_VALUES %z0(s64)
+ $x10 = COPY %zlo(s32)
+ $x11 = COPY %zhi(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -147,43 +147,43 @@ name: lshr_i64
body: |
bb.0.entry:
; CHECK-LABEL: name: lshr_i64
- ; CHECK: %hi1:_(s32) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
+ ; CHECK: %lo1:_(s32) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %hi2, [[C]]
- ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], %hi2
+ ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %lo2, [[C]]
+ ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], %lo2
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %hi2(s32), [[C]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %hi2(s32), [[C1]]
- ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %lo1, %hi2(s32)
- ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR %hi1, %hi2(s32)
- ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %lo1, [[SUB1]](s32)
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %lo2(s32), [[C]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %lo2(s32), [[C1]]
+ ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %hi1, %lo2(s32)
+ ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR %lo1, %lo2(s32)
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %hi1, [[SUB1]](s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR1]], [[SHL]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR %lo1, [[SUB]](s32)
+ ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR %hi1, [[SUB]](s32)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP]], [[C3]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[OR]], [[LSHR2]]
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C4]]
- ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), %hi1, [[SELECT]]
+ ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), %lo1, [[SELECT]]
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ICMP]], [[C5]]
; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), [[LSHR]], [[C2]]
; CHECK-NEXT: $x10 = COPY [[SELECT1]](s32)
; CHECK-NEXT: $x11 = COPY [[SELECT2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s32) = COPY $x10
- %lo1:_(s32) = COPY $x11
- %hi2:_(s32) = COPY $x12
- %lo2:_(s32) = COPY $x13
- %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
- %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %lo1:_(s32) = COPY $x10
+ %hi1:_(s32) = COPY $x11
+ %lo2:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %lo1(s32), %hi1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %lo2(s32), %hi2(s32)
%y:_(s64) = G_LSHR %x1, %x2
- %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
- $x10 = COPY %hiy(s32)
- $x11 = COPY %loy(s32)
+ %loy:_(s32), %hiy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %loy(s32)
+ $x11 = COPY %hiy(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -192,24 +192,24 @@ name: lshr_i96
body: |
bb.0.entry:
; CHECK-LABEL: name: lshr_i96
- ; CHECK: %hi1:_(s32) = COPY $x10
+ ; CHECK: %lo1:_(s32) = COPY $x10
; CHECK-NEXT: %mid1:_(s32) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 64
- ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %hi2, [[C1]]
- ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C1]], %hi2
+ ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %lo2, [[C1]]
+ ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C1]], %lo2
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %hi2(s32), [[C1]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %hi2(s32), [[C2]]
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %lo2(s32), [[C1]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %lo2(s32), [[C2]]
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; CHECK-NEXT: [[SUB2:%[0-9]+]]:_(s32) = G_SUB %hi2, [[C3]]
- ; CHECK-NEXT: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C3]], %hi2
+ ; CHECK-NEXT: [[SUB2:%[0-9]+]]:_(s32) = G_SUB %lo2, [[C3]]
+ ; CHECK-NEXT: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C3]], %lo2
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %hi2(s32), [[C3]]
- ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %hi2(s32), [[C4]]
- ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %lo1, %hi2(s32)
+ ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %lo2(s32), [[C3]]
+ ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %lo2(s32), [[C4]]
+ ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %hi1, %lo2(s32)
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[C]], [[SUB3]](s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL]]
; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[C]], [[SUB2]](s32)
@@ -218,15 +218,15 @@ body: |
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[OR]], [[LSHR1]]
; CHECK-NEXT: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ICMP3]], [[C6]]
- ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), %lo1, [[SELECT]]
+ ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), %hi1, [[SELECT]]
; CHECK-NEXT: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; CHECK-NEXT: [[SUB4:%[0-9]+]]:_(s32) = G_SUB %hi2, [[C7]]
- ; CHECK-NEXT: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C7]], %hi2
+ ; CHECK-NEXT: [[SUB4:%[0-9]+]]:_(s32) = G_SUB %lo2, [[C7]]
+ ; CHECK-NEXT: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[C7]], %lo2
; CHECK-NEXT: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %hi2(s32), [[C7]]
- ; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %hi2(s32), [[C8]]
- ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR %mid1, %hi2(s32)
- ; CHECK-NEXT: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR %hi1, %hi2(s32)
+ ; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %lo2(s32), [[C7]]
+ ; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %lo2(s32), [[C8]]
+ ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR %mid1, %lo2(s32)
+ ; CHECK-NEXT: [[LSHR3:%[0-9]+]]:_(s32) = G_LSHR %lo1, %lo2(s32)
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL %mid1, [[SUB5]](s32)
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[LSHR3]], [[SHL1]]
; CHECK-NEXT: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
@@ -236,7 +236,7 @@ body: |
; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), [[OR1]], [[LSHR4]]
; CHECK-NEXT: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[ICMP5]], [[C11]]
- ; CHECK-NEXT: [[SELECT3:%[0-9]+]]:_(s32) = G_SELECT [[AND3]](s32), %hi1, [[SELECT2]]
+ ; CHECK-NEXT: [[SELECT3:%[0-9]+]]:_(s32) = G_SELECT [[AND3]](s32), %lo1, [[SELECT2]]
; CHECK-NEXT: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s32) = G_AND [[ICMP4]], [[C12]]
; CHECK-NEXT: [[SELECT4:%[0-9]+]]:_(s32) = G_SELECT [[AND4]](s32), [[LSHR2]], [[C9]]
@@ -246,12 +246,12 @@ body: |
; CHECK-NEXT: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[ICMP6:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[SUB1]](s32), [[C13]]
; CHECK-NEXT: [[ICMP7:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[SUB1]](s32), [[C14]]
- ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL %lo1, [[SUB1]](s32)
- ; CHECK-NEXT: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR %lo1, [[SUB7]](s32)
+ ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL %hi1, [[SUB1]](s32)
+ ; CHECK-NEXT: [[LSHR5:%[0-9]+]]:_(s32) = G_LSHR %hi1, [[SUB7]](s32)
; CHECK-NEXT: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[C]], [[SUB1]](s32)
; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR [[LSHR5]], [[SHL3]]
; CHECK-NEXT: [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s32) = G_SHL %lo1, [[SUB6]](s32)
+ ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s32) = G_SHL %hi1, [[SUB6]](s32)
; CHECK-NEXT: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s32) = G_AND [[ICMP6]], [[C16]]
; CHECK-NEXT: [[SELECT5:%[0-9]+]]:_(s32) = G_SELECT [[AND5]](s32), [[SHL2]], [[C15]]
@@ -271,7 +271,7 @@ body: |
; CHECK-NEXT: [[ICMP8:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[SUB]](s32), [[C20]]
; CHECK-NEXT: [[ICMP9:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[SUB]](s32), [[C21]]
; CHECK-NEXT: [[LSHR6:%[0-9]+]]:_(s32) = G_LSHR [[C]], [[SUB]](s32)
- ; CHECK-NEXT: [[LSHR7:%[0-9]+]]:_(s32) = G_LSHR %lo1, [[SUB]](s32)
+ ; CHECK-NEXT: [[LSHR7:%[0-9]+]]:_(s32) = G_LSHR %hi1, [[SUB]](s32)
; CHECK-NEXT: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[C]], [[SUB9]](s32)
; CHECK-NEXT: [[OR5:%[0-9]+]]:_(s32) = G_OR [[LSHR7]], [[SHL5]]
; CHECK-NEXT: [[C22:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
@@ -281,7 +281,7 @@ body: |
; CHECK-NEXT: [[SELECT8:%[0-9]+]]:_(s32) = G_SELECT [[AND8]](s32), [[OR5]], [[LSHR8]]
; CHECK-NEXT: [[C24:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND9:%[0-9]+]]:_(s32) = G_AND [[ICMP9]], [[C24]]
- ; CHECK-NEXT: [[SELECT9:%[0-9]+]]:_(s32) = G_SELECT [[AND9]](s32), %lo1, [[SELECT8]]
+ ; CHECK-NEXT: [[SELECT9:%[0-9]+]]:_(s32) = G_SELECT [[AND9]](s32), %hi1, [[SELECT8]]
; CHECK-NEXT: [[C25:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND10:%[0-9]+]]:_(s32) = G_AND [[ICMP8]], [[C25]]
; CHECK-NEXT: [[SELECT10:%[0-9]+]]:_(s32) = G_SELECT [[AND10]](s32), [[LSHR6]], [[C22]]
@@ -293,7 +293,7 @@ body: |
; CHECK-NEXT: [[SELECT12:%[0-9]+]]:_(s32) = G_SELECT [[AND12]](s32), [[OR4]], [[SELECT10]]
; CHECK-NEXT: [[C28:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND13:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C28]]
- ; CHECK-NEXT: [[SELECT13:%[0-9]+]]:_(s32) = G_SELECT [[AND13]](s32), %hi1, [[SELECT11]]
+ ; CHECK-NEXT: [[SELECT13:%[0-9]+]]:_(s32) = G_SELECT [[AND13]](s32), %lo1, [[SELECT11]]
; CHECK-NEXT: [[C29:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND14:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C29]]
; CHECK-NEXT: [[SELECT14:%[0-9]+]]:_(s32) = G_SELECT [[AND14]](s32), %mid1, [[SELECT12]]
@@ -304,19 +304,19 @@ body: |
; CHECK-NEXT: $x11 = COPY [[SELECT14]](s32)
; CHECK-NEXT: $x12 = COPY [[SELECT15]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s32) = COPY $x10
+ %lo1:_(s32) = COPY $x10
%mid1:_(s32) = COPY $x11
- %lo1:_(s32) = COPY $x12
- %hi2:_(s32) = COPY $x13
+ %hi1:_(s32) = COPY $x12
+ %lo2:_(s32) = COPY $x13
%mid2:_(s32) = COPY $x14
- %lo2:_(s32) = COPY $x15
- %x1:_(s96) = G_MERGE_VALUES %hi1(s32), %mid1(s32), %lo1(s32)
- %x2:_(s96) = G_MERGE_VALUES %hi2(s32), %mid2(s32), %lo2(s32)
+ %hi2:_(s32) = COPY $x15
+ %x1:_(s96) = G_MERGE_VALUES %lo1(s32), %mid1(s32), %hi1(s32)
+ %x2:_(s96) = G_MERGE_VALUES %lo2(s32), %mid2(s32), %hi2(s32)
%y:_(s96) = G_LSHR %x1, %x2
- %hi:_(s32), %mid:_(s32), %lo:_(s32) = G_UNMERGE_VALUES %y(s96)
- $x10 = COPY %hi(s32)
+ %lo:_(s32), %mid:_(s32), %hi:_(s32) = G_UNMERGE_VALUES %y(s96)
+ $x10 = COPY %lo(s32)
$x11 = COPY %mid(s32)
- $x12 = COPY %lo(s32)
+ $x12 = COPY %hi(s32)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-mul-ext.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-mul-ext.mir
index 591a99865094c9..cc7587aa314e3b 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-mul-ext.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-mul-ext.mir
@@ -85,32 +85,32 @@ name: mul_i48
body: |
bb.0.entry:
; CHECK-LABEL: name: mul_i48
- ; CHECK: %xhi:_(s32) = COPY $x10
- ; CHECK-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-NEXT: %yhi:_(s32) = COPY $x12
- ; CHECK-NEXT: %ylo:_(s32) = COPY $x13
- ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL %xhi, %yhi
- ; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(s32) = G_MUL %xlo, %yhi
- ; CHECK-NEXT: [[MUL2:%[0-9]+]]:_(s32) = G_MUL %xhi, %ylo
- ; CHECK-NEXT: [[UMULH:%[0-9]+]]:_(s32) = G_UMULH %xhi, %yhi
+ ; CHECK: %xlo:_(s32) = COPY $x10
+ ; CHECK-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-NEXT: %ylo:_(s32) = COPY $x12
+ ; CHECK-NEXT: %yhi:_(s32) = COPY $x13
+ ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL %xlo, %ylo
+ ; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(s32) = G_MUL %xhi, %ylo
+ ; CHECK-NEXT: [[MUL2:%[0-9]+]]:_(s32) = G_MUL %xlo, %yhi
+ ; CHECK-NEXT: [[UMULH:%[0-9]+]]:_(s32) = G_UMULH %xlo, %ylo
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[MUL1]], [[MUL2]]
; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[UMULH]]
; CHECK-NEXT: $x10 = COPY [[MUL]](s32)
; CHECK-NEXT: $x11 = COPY [[ADD1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s32) = COPY $x10
- %xlo:_(s32) = COPY $x11
- %yhi:_(s32) = COPY $x12
- %ylo:_(s32) = COPY $x13
- %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
- %y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
+ %xlo:_(s32) = COPY $x10
+ %xhi:_(s32) = COPY $x11
+ %ylo:_(s32) = COPY $x12
+ %yhi:_(s32) = COPY $x13
+ %x0:_(s64) = G_MERGE_VALUES %xlo(s32), %xhi(s32)
+ %y0:_(s64) = G_MERGE_VALUES %ylo(s32), %yhi(s32)
%x:_(s48) = G_TRUNC %x0(s64)
%y:_(s48) = G_TRUNC %y0(s64)
%z:_(s48) = G_MUL %x, %y
%z0:_(s64) = G_ANYEXT %z(s48)
- %zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
- $x10 = COPY %zhi(s32)
- $x11 = COPY %zlo(s32)
+ %zlo:_(s32), %zhi:_(s32) = G_UNMERGE_VALUES %z0(s64)
+ $x10 = COPY %zlo(s32)
+ $x11 = COPY %zhi(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -119,29 +119,29 @@ name: mul_i64
body: |
bb.0.entry:
; CHECK-LABEL: name: mul_i64
- ; CHECK: %hi1:_(s32) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
- ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
- ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL %hi1, %hi2
- ; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(s32) = G_MUL %lo1, %hi2
- ; CHECK-NEXT: [[MUL2:%[0-9]+]]:_(s32) = G_MUL %hi1, %lo2
- ; CHECK-NEXT: [[UMULH:%[0-9]+]]:_(s32) = G_UMULH %hi1, %hi2
+ ; CHECK: %lo1:_(s32) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL %lo1, %lo2
+ ; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(s32) = G_MUL %hi1, %lo2
+ ; CHECK-NEXT: [[MUL2:%[0-9]+]]:_(s32) = G_MUL %lo1, %hi2
+ ; CHECK-NEXT: [[UMULH:%[0-9]+]]:_(s32) = G_UMULH %lo1, %lo2
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[MUL1]], [[MUL2]]
; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[ADD]], [[UMULH]]
; CHECK-NEXT: $x10 = COPY [[MUL]](s32)
; CHECK-NEXT: $x11 = COPY [[ADD1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s32) = COPY $x10
- %lo1:_(s32) = COPY $x11
- %hi2:_(s32) = COPY $x12
- %lo2:_(s32) = COPY $x13
- %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
- %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %lo1:_(s32) = COPY $x10
+ %hi1:_(s32) = COPY $x11
+ %lo2:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %lo1(s32), %hi1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %lo2(s32), %hi2(s32)
%y:_(s64) = G_MUL %x1, %x2
- %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
- $x10 = COPY %hiy(s32)
- $x11 = COPY %loy(s32)
+ %loy:_(s32), %hiy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %loy(s32)
+ $x11 = COPY %hiy(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -150,16 +150,16 @@ name: mul_i96
body: |
bb.0.entry:
; CHECK-LABEL: name: mul_i96
- ; CHECK: %hi1:_(s32) = COPY $x10
+ ; CHECK: %lo1:_(s32) = COPY $x10
; CHECK-NEXT: %mid1:_(s32) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
; CHECK-NEXT: %mid2:_(s32) = COPY $x14
- ; CHECK-NEXT: %lo2:_(s32) = COPY $x15
- ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL %hi1, %hi2
- ; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(s32) = G_MUL %mid1, %hi2
- ; CHECK-NEXT: [[MUL2:%[0-9]+]]:_(s32) = G_MUL %hi1, %mid2
- ; CHECK-NEXT: [[UMULH:%[0-9]+]]:_(s32) = G_UMULH %hi1, %hi2
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x15
+ ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL %lo1, %lo2
+ ; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(s32) = G_MUL %mid1, %lo2
+ ; CHECK-NEXT: [[MUL2:%[0-9]+]]:_(s32) = G_MUL %lo1, %mid2
+ ; CHECK-NEXT: [[UMULH:%[0-9]+]]:_(s32) = G_UMULH %lo1, %lo2
; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s32), [[UADDO1:%[0-9]+]]:_(s32) = G_UADDO [[MUL1]], [[MUL2]]
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[UADDO1]], [[C]]
@@ -167,11 +167,11 @@ body: |
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[UADDO3]], [[C1]]
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[AND]], [[AND1]]
- ; CHECK-NEXT: [[MUL3:%[0-9]+]]:_(s32) = G_MUL %lo1, %hi2
+ ; CHECK-NEXT: [[MUL3:%[0-9]+]]:_(s32) = G_MUL %hi1, %lo2
; CHECK-NEXT: [[MUL4:%[0-9]+]]:_(s32) = G_MUL %mid1, %mid2
- ; CHECK-NEXT: [[MUL5:%[0-9]+]]:_(s32) = G_MUL %hi1, %lo2
- ; CHECK-NEXT: [[UMULH1:%[0-9]+]]:_(s32) = G_UMULH %mid1, %hi2
- ; CHECK-NEXT: [[UMULH2:%[0-9]+]]:_(s32) = G_UMULH %hi1, %mid2
+ ; CHECK-NEXT: [[MUL5:%[0-9]+]]:_(s32) = G_MUL %lo1, %hi2
+ ; CHECK-NEXT: [[UMULH1:%[0-9]+]]:_(s32) = G_UMULH %mid1, %lo2
+ ; CHECK-NEXT: [[UMULH2:%[0-9]+]]:_(s32) = G_UMULH %lo1, %mid2
; CHECK-NEXT: [[UADDO4:%[0-9]+]]:_(s32), [[UADDO5:%[0-9]+]]:_(s32) = G_UADDO [[MUL3]], [[MUL4]]
; CHECK-NEXT: [[UADDO6:%[0-9]+]]:_(s32), [[UADDO7:%[0-9]+]]:_(s32) = G_UADDO [[UADDO4]], [[MUL5]]
; CHECK-NEXT: [[UADDO8:%[0-9]+]]:_(s32), [[UADDO9:%[0-9]+]]:_(s32) = G_UADDO [[UADDO6]], [[UMULH1]]
@@ -181,19 +181,19 @@ body: |
; CHECK-NEXT: $x11 = COPY [[UADDO2]](s32)
; CHECK-NEXT: $x12 = COPY [[UADDO12]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s32) = COPY $x10
+ %lo1:_(s32) = COPY $x10
%mid1:_(s32) = COPY $x11
- %lo1:_(s32) = COPY $x12
- %hi2:_(s32) = COPY $x13
+ %hi1:_(s32) = COPY $x12
+ %lo2:_(s32) = COPY $x13
%mid2:_(s32) = COPY $x14
- %lo2:_(s32) = COPY $x15
- %x1:_(s96) = G_MERGE_VALUES %hi1(s32), %mid1(s32), %lo1(s32)
- %x2:_(s96) = G_MERGE_VALUES %hi2(s32), %mid2(s32), %lo2(s32)
+ %hi2:_(s32) = COPY $x15
+ %x1:_(s96) = G_MERGE_VALUES %lo1(s32), %mid1(s32), %hi1(s32)
+ %x2:_(s96) = G_MERGE_VALUES %lo2(s32), %mid2(s32), %hi2(s32)
%y:_(s96) = G_MUL %x1, %x2
- %hi:_(s32), %mid:_(s32), %lo:_(s32) = G_UNMERGE_VALUES %y(s96)
- $x10 = COPY %hi(s32)
+ %lo:_(s32), %mid:_(s32), %hi:_(s32) = G_UNMERGE_VALUES %y(s96)
+ $x10 = COPY %lo(s32)
$x11 = COPY %mid(s32)
- $x12 = COPY %lo(s32)
+ $x12 = COPY %hi(s32)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-mul.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-mul.mir
index 6829f55c708e7e..fb59dfb3a2f001 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-mul.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-mul.mir
@@ -95,30 +95,30 @@ name: mul_i64
body: |
bb.0.entry:
; CHECK-LABEL: name: mul_i64
- ; CHECK: %hi1:_(s32) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
- ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
- ; CHECK-NEXT: $x10 = COPY %hi1(s32)
- ; CHECK-NEXT: $x11 = COPY %lo1(s32)
- ; CHECK-NEXT: $x12 = COPY %hi2(s32)
- ; CHECK-NEXT: $x13 = COPY %lo2(s32)
+ ; CHECK: %lo1:_(s32) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: $x10 = COPY %lo1(s32)
+ ; CHECK-NEXT: $x11 = COPY %hi1(s32)
+ ; CHECK-NEXT: $x12 = COPY %lo2(s32)
+ ; CHECK-NEXT: $x13 = COPY %hi2(s32)
; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &__muldi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-NEXT: $x11 = COPY [[COPY1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s32) = COPY $x10
- %lo1:_(s32) = COPY $x11
- %hi2:_(s32) = COPY $x12
- %lo2:_(s32) = COPY $x13
- %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
- %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %lo1:_(s32) = COPY $x10
+ %hi1:_(s32) = COPY $x11
+ %lo2:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %lo1(s32), %hi1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %lo2(s32), %hi2(s32)
%y:_(s64) = G_MUL %x1, %x2
- %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
- $x10 = COPY %hiy(s32)
- $x11 = COPY %loy(s32)
+ %loy:_(s32), %hiy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %loy(s32)
+ $x11 = COPY %hiy(s32)
PseudoRET implicit $x10, implicit $x11
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir
index e2dc1d30364c05..881f826e0ed045 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-or.mir
@@ -83,28 +83,28 @@ name: or_i48
body: |
bb.0.entry:
; CHECK-LABEL: name: or_i48
- ; CHECK: %xhi:_(s32) = COPY $x10
- ; CHECK-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-NEXT: %yhi:_(s32) = COPY $x12
- ; CHECK-NEXT: %ylo:_(s32) = COPY $x13
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %xhi, %yhi
- ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR %xlo, %ylo
+ ; CHECK: %xlo:_(s32) = COPY $x10
+ ; CHECK-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-NEXT: %ylo:_(s32) = COPY $x12
+ ; CHECK-NEXT: %yhi:_(s32) = COPY $x13
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %xlo, %ylo
+ ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR %xhi, %yhi
; CHECK-NEXT: $x10 = COPY [[OR]](s32)
; CHECK-NEXT: $x11 = COPY [[OR1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s32) = COPY $x10
- %xlo:_(s32) = COPY $x11
- %yhi:_(s32) = COPY $x12
- %ylo:_(s32) = COPY $x13
- %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
- %y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
+ %xlo:_(s32) = COPY $x10
+ %xhi:_(s32) = COPY $x11
+ %ylo:_(s32) = COPY $x12
+ %yhi:_(s32) = COPY $x13
+ %x0:_(s64) = G_MERGE_VALUES %xlo(s32), %xhi(s32)
+ %y0:_(s64) = G_MERGE_VALUES %ylo(s32), %yhi(s32)
%x:_(s48) = G_TRUNC %x0(s64)
%y:_(s48) = G_TRUNC %y0(s64)
%z:_(s48) = G_OR %x, %y
%z0:_(s64) = G_ANYEXT %z(s48)
- %zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
- $x10 = COPY %zhi(s32)
- $x11 = COPY %zlo(s32)
+ %zlo:_(s32), %zhi:_(s32) = G_UNMERGE_VALUES %z0(s64)
+ $x10 = COPY %zlo(s32)
+ $x11 = COPY %zhi(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -113,25 +113,25 @@ name: or_i64
body: |
bb.0.entry:
; CHECK-LABEL: name: or_i64
- ; CHECK: %hi1:_(s32) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
- ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %hi1, %hi2
- ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR %lo1, %lo2
+ ; CHECK: %lo1:_(s32) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %lo1, %lo2
+ ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR %hi1, %hi2
; CHECK-NEXT: $x10 = COPY [[OR]](s32)
; CHECK-NEXT: $x11 = COPY [[OR1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s32) = COPY $x10
- %lo1:_(s32) = COPY $x11
- %hi2:_(s32) = COPY $x12
- %lo2:_(s32) = COPY $x13
- %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
- %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %lo1:_(s32) = COPY $x10
+ %hi1:_(s32) = COPY $x11
+ %lo2:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %lo1(s32), %hi1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %lo2(s32), %hi2(s32)
%y:_(s64) = G_OR %x1, %x2
- %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
- $x10 = COPY %hiy(s32)
- $x11 = COPY %loy(s32)
+ %loy:_(s32), %hiy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %loy(s32)
+ $x11 = COPY %hiy(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -140,32 +140,32 @@ name: or_i96
body: |
bb.0.entry:
; CHECK-LABEL: name: or_i96
- ; CHECK: %hi1:_(s32) = COPY $x10
+ ; CHECK: %lo1:_(s32) = COPY $x10
; CHECK-NEXT: %mid1:_(s32) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
; CHECK-NEXT: %mid2:_(s32) = COPY $x14
- ; CHECK-NEXT: %lo2:_(s32) = COPY $x15
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %hi1, %hi2
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x15
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR %lo1, %lo2
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR %mid1, %mid2
- ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR %lo1, %lo2
+ ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s32) = G_OR %hi1, %hi2
; CHECK-NEXT: $x10 = COPY [[OR]](s32)
; CHECK-NEXT: $x11 = COPY [[OR1]](s32)
; CHECK-NEXT: $x12 = COPY [[OR2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s32) = COPY $x10
+ %lo1:_(s32) = COPY $x10
%mid1:_(s32) = COPY $x11
- %lo1:_(s32) = COPY $x12
- %hi2:_(s32) = COPY $x13
+ %hi1:_(s32) = COPY $x12
+ %lo2:_(s32) = COPY $x13
%mid2:_(s32) = COPY $x14
- %lo2:_(s32) = COPY $x15
- %x1:_(s96) = G_MERGE_VALUES %hi1(s32), %mid1(s32), %lo1(s32)
- %x2:_(s96) = G_MERGE_VALUES %hi2(s32), %mid2(s32), %lo2(s32)
+ %hi2:_(s32) = COPY $x15
+ %x1:_(s96) = G_MERGE_VALUES %lo1(s32), %mid1(s32), %hi1(s32)
+ %x2:_(s96) = G_MERGE_VALUES %lo2(s32), %mid2(s32), %hi2(s32)
%y:_(s96) = G_OR %x1, %x2
- %hi:_(s32), %mid:_(s32), %lo:_(s32) = G_UNMERGE_VALUES %y(s96)
- $x10 = COPY %hi(s32)
+ %lo:_(s32), %mid:_(s32), %hi:_(s32) = G_UNMERGE_VALUES %y(s96)
+ $x10 = COPY %lo(s32)
$x11 = COPY %mid(s32)
- $x12 = COPY %lo(s32)
+ $x12 = COPY %hi(s32)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-rem.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-rem.mir
index 20a9c3daf4598d..6ad63f36dd1a67 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-rem.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-rem.mir
@@ -137,15 +137,15 @@ name: srem_i48
body: |
bb.0.entry:
; CHECK-I-LABEL: name: srem_i48
- ; CHECK-I: %xhi:_(s32) = COPY $x10
- ; CHECK-I-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-I-NEXT: %yhi:_(s32) = COPY $x12
- ; CHECK-I-NEXT: %ylo:_(s32) = COPY $x13
- ; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xlo, 16
- ; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %ylo, 16
- ; CHECK-I-NEXT: $x10 = COPY %xhi(s32)
+ ; CHECK-I: %xlo:_(s32) = COPY $x10
+ ; CHECK-I-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-I-NEXT: %ylo:_(s32) = COPY $x12
+ ; CHECK-I-NEXT: %yhi:_(s32) = COPY $x13
+ ; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xhi, 16
+ ; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %yhi, 16
+ ; CHECK-I-NEXT: $x10 = COPY %xlo(s32)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG]](s32)
- ; CHECK-I-NEXT: $x12 = COPY %yhi(s32)
+ ; CHECK-I-NEXT: $x12 = COPY %ylo(s32)
; CHECK-I-NEXT: $x13 = COPY [[SEXT_INREG1]](s32)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
@@ -155,15 +155,15 @@ body: |
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
;
; CHECK-M-LABEL: name: srem_i48
- ; CHECK-M: %xhi:_(s32) = COPY $x10
- ; CHECK-M-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-M-NEXT: %yhi:_(s32) = COPY $x12
- ; CHECK-M-NEXT: %ylo:_(s32) = COPY $x13
- ; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xlo, 16
- ; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %ylo, 16
- ; CHECK-M-NEXT: $x10 = COPY %xhi(s32)
+ ; CHECK-M: %xlo:_(s32) = COPY $x10
+ ; CHECK-M-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-M-NEXT: %ylo:_(s32) = COPY $x12
+ ; CHECK-M-NEXT: %yhi:_(s32) = COPY $x13
+ ; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG %xhi, 16
+ ; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG %yhi, 16
+ ; CHECK-M-NEXT: $x10 = COPY %xlo(s32)
; CHECK-M-NEXT: $x11 = COPY [[SEXT_INREG]](s32)
- ; CHECK-M-NEXT: $x12 = COPY %yhi(s32)
+ ; CHECK-M-NEXT: $x12 = COPY %ylo(s32)
; CHECK-M-NEXT: $x13 = COPY [[SEXT_INREG1]](s32)
; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
@@ -171,19 +171,19 @@ body: |
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s32)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s32) = COPY $x10
- %xlo:_(s32) = COPY $x11
- %yhi:_(s32) = COPY $x12
- %ylo:_(s32) = COPY $x13
- %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
- %y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
+ %xlo:_(s32) = COPY $x10
+ %xhi:_(s32) = COPY $x11
+ %ylo:_(s32) = COPY $x12
+ %yhi:_(s32) = COPY $x13
+ %x0:_(s64) = G_MERGE_VALUES %xlo(s32), %xhi(s32)
+ %y0:_(s64) = G_MERGE_VALUES %ylo(s32), %yhi(s32)
%x:_(s48) = G_TRUNC %x0
%y:_(s48) = G_TRUNC %y0
%z:_(s48) = G_SREM %x, %y
%z0:_(s64) = G_ANYEXT %z
- %zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
- $x10 = COPY %zhi(s32)
- $x11 = COPY %zlo(s32)
+ %zlo:_(s32), %zhi:_(s32) = G_UNMERGE_VALUES %z0(s64)
+ $x10 = COPY %zlo(s32)
+ $x11 = COPY %zhi(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -192,14 +192,14 @@ name: srem_i64
body: |
bb.0.entry:
; CHECK-I-LABEL: name: srem_i64
- ; CHECK-I: %hi1:_(s32) = COPY $x10
- ; CHECK-I-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-I-NEXT: %hi2:_(s32) = COPY $x12
- ; CHECK-I-NEXT: %lo2:_(s32) = COPY $x13
- ; CHECK-I-NEXT: $x10 = COPY %hi1(s32)
- ; CHECK-I-NEXT: $x11 = COPY %lo1(s32)
- ; CHECK-I-NEXT: $x12 = COPY %hi2(s32)
- ; CHECK-I-NEXT: $x13 = COPY %lo2(s32)
+ ; CHECK-I: %lo1:_(s32) = COPY $x10
+ ; CHECK-I-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-I-NEXT: %lo2:_(s32) = COPY $x12
+ ; CHECK-I-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-I-NEXT: $x10 = COPY %lo1(s32)
+ ; CHECK-I-NEXT: $x11 = COPY %hi1(s32)
+ ; CHECK-I-NEXT: $x12 = COPY %lo2(s32)
+ ; CHECK-I-NEXT: $x13 = COPY %hi2(s32)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -208,30 +208,30 @@ body: |
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
;
; CHECK-M-LABEL: name: srem_i64
- ; CHECK-M: %hi1:_(s32) = COPY $x10
- ; CHECK-M-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-M-NEXT: %hi2:_(s32) = COPY $x12
- ; CHECK-M-NEXT: %lo2:_(s32) = COPY $x13
- ; CHECK-M-NEXT: $x10 = COPY %hi1(s32)
- ; CHECK-M-NEXT: $x11 = COPY %lo1(s32)
- ; CHECK-M-NEXT: $x12 = COPY %hi2(s32)
- ; CHECK-M-NEXT: $x13 = COPY %lo2(s32)
+ ; CHECK-M: %lo1:_(s32) = COPY $x10
+ ; CHECK-M-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-M-NEXT: %lo2:_(s32) = COPY $x12
+ ; CHECK-M-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-M-NEXT: $x10 = COPY %lo1(s32)
+ ; CHECK-M-NEXT: $x11 = COPY %hi1(s32)
+ ; CHECK-M-NEXT: $x12 = COPY %lo2(s32)
+ ; CHECK-M-NEXT: $x13 = COPY %hi2(s32)
; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__moddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s32)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s32) = COPY $x10
- %lo1:_(s32) = COPY $x11
- %hi2:_(s32) = COPY $x12
- %lo2:_(s32) = COPY $x13
- %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
- %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %lo1:_(s32) = COPY $x10
+ %hi1:_(s32) = COPY $x11
+ %lo2:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %lo1(s32), %hi1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %lo2(s32), %hi2(s32)
%y:_(s64) = G_SREM %x1, %x2
- %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
- $x10 = COPY %hiy(s32)
- $x11 = COPY %loy(s32)
+ %loy:_(s32), %hiy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %loy(s32)
+ $x11 = COPY %hiy(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -381,18 +381,18 @@ name: urem_i48
body: |
bb.0.entry:
; CHECK-I-LABEL: name: urem_i48
- ; CHECK-I: %xhi:_(s32) = COPY $x10
- ; CHECK-I-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-I-NEXT: %yhi:_(s32) = COPY $x12
- ; CHECK-I-NEXT: %ylo:_(s32) = COPY $x13
+ ; CHECK-I: %xlo:_(s32) = COPY $x10
+ ; CHECK-I-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-I-NEXT: %ylo:_(s32) = COPY $x12
+ ; CHECK-I-NEXT: %yhi:_(s32) = COPY $x13
; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
- ; CHECK-I-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %xhi, [[C]]
- ; CHECK-I-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %xlo, [[C1]]
+ ; CHECK-I-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %xlo, [[C]]
+ ; CHECK-I-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %xhi, [[C1]]
; CHECK-I-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
; CHECK-I-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
- ; CHECK-I-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND %yhi, [[C2]]
- ; CHECK-I-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND %ylo, [[C3]]
+ ; CHECK-I-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND %ylo, [[C2]]
+ ; CHECK-I-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND %yhi, [[C3]]
; CHECK-I-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s32)
; CHECK-I-NEXT: $x12 = COPY [[AND2]](s32)
@@ -405,18 +405,18 @@ body: |
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
;
; CHECK-M-LABEL: name: urem_i48
- ; CHECK-M: %xhi:_(s32) = COPY $x10
- ; CHECK-M-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-M-NEXT: %yhi:_(s32) = COPY $x12
- ; CHECK-M-NEXT: %ylo:_(s32) = COPY $x13
+ ; CHECK-M: %xlo:_(s32) = COPY $x10
+ ; CHECK-M-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-M-NEXT: %ylo:_(s32) = COPY $x12
+ ; CHECK-M-NEXT: %yhi:_(s32) = COPY $x13
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
- ; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %xhi, [[C]]
- ; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %xlo, [[C1]]
+ ; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND %xlo, [[C]]
+ ; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND %xhi, [[C1]]
; CHECK-M-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1
; CHECK-M-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
- ; CHECK-M-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND %yhi, [[C2]]
- ; CHECK-M-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND %ylo, [[C3]]
+ ; CHECK-M-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND %ylo, [[C2]]
+ ; CHECK-M-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND %yhi, [[C3]]
; CHECK-M-NEXT: $x10 = COPY [[AND]](s32)
; CHECK-M-NEXT: $x11 = COPY [[AND1]](s32)
; CHECK-M-NEXT: $x12 = COPY [[AND2]](s32)
@@ -427,19 +427,19 @@ body: |
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s32)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s32) = COPY $x10
- %xlo:_(s32) = COPY $x11
- %yhi:_(s32) = COPY $x12
- %ylo:_(s32) = COPY $x13
- %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
- %y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
+ %xlo:_(s32) = COPY $x10
+ %xhi:_(s32) = COPY $x11
+ %ylo:_(s32) = COPY $x12
+ %yhi:_(s32) = COPY $x13
+ %x0:_(s64) = G_MERGE_VALUES %xlo(s32), %xhi(s32)
+ %y0:_(s64) = G_MERGE_VALUES %ylo(s32), %yhi(s32)
%x:_(s48) = G_TRUNC %x0
%y:_(s48) = G_TRUNC %y0
%z:_(s48) = G_UREM %x, %y
%z0:_(s64) = G_ANYEXT %z
- %zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
- $x10 = COPY %zhi(s32)
- $x11 = COPY %zlo(s32)
+ %zlo:_(s32), %zhi:_(s32) = G_UNMERGE_VALUES %z0(s64)
+ $x10 = COPY %zlo(s32)
+ $x11 = COPY %zhi(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -448,14 +448,14 @@ name: urem_i64
body: |
bb.0.entry:
; CHECK-I-LABEL: name: urem_i64
- ; CHECK-I: %hi1:_(s32) = COPY $x10
- ; CHECK-I-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-I-NEXT: %hi2:_(s32) = COPY $x12
- ; CHECK-I-NEXT: %lo2:_(s32) = COPY $x13
- ; CHECK-I-NEXT: $x10 = COPY %hi1(s32)
- ; CHECK-I-NEXT: $x11 = COPY %lo1(s32)
- ; CHECK-I-NEXT: $x12 = COPY %hi2(s32)
- ; CHECK-I-NEXT: $x13 = COPY %lo2(s32)
+ ; CHECK-I: %lo1:_(s32) = COPY $x10
+ ; CHECK-I-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-I-NEXT: %lo2:_(s32) = COPY $x12
+ ; CHECK-I-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-I-NEXT: $x10 = COPY %lo1(s32)
+ ; CHECK-I-NEXT: $x11 = COPY %hi1(s32)
+ ; CHECK-I-NEXT: $x12 = COPY %lo2(s32)
+ ; CHECK-I-NEXT: $x13 = COPY %hi2(s32)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umoddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
@@ -464,30 +464,30 @@ body: |
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
;
; CHECK-M-LABEL: name: urem_i64
- ; CHECK-M: %hi1:_(s32) = COPY $x10
- ; CHECK-M-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-M-NEXT: %hi2:_(s32) = COPY $x12
- ; CHECK-M-NEXT: %lo2:_(s32) = COPY $x13
- ; CHECK-M-NEXT: $x10 = COPY %hi1(s32)
- ; CHECK-M-NEXT: $x11 = COPY %lo1(s32)
- ; CHECK-M-NEXT: $x12 = COPY %hi2(s32)
- ; CHECK-M-NEXT: $x13 = COPY %lo2(s32)
+ ; CHECK-M: %lo1:_(s32) = COPY $x10
+ ; CHECK-M-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-M-NEXT: %lo2:_(s32) = COPY $x12
+ ; CHECK-M-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-M-NEXT: $x10 = COPY %lo1(s32)
+ ; CHECK-M-NEXT: $x11 = COPY %hi1(s32)
+ ; CHECK-M-NEXT: $x12 = COPY %lo2(s32)
+ ; CHECK-M-NEXT: $x13 = COPY %hi2(s32)
; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__umoddi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s32)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s32)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s32) = COPY $x10
- %lo1:_(s32) = COPY $x11
- %hi2:_(s32) = COPY $x12
- %lo2:_(s32) = COPY $x13
- %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
- %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %lo1:_(s32) = COPY $x10
+ %hi1:_(s32) = COPY $x11
+ %lo2:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %lo1(s32), %hi1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %lo2(s32), %hi2(s32)
%y:_(s64) = G_UREM %x1, %x2
- %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
- $x10 = COPY %hiy(s32)
- $x11 = COPY %loy(s32)
+ %loy:_(s32), %hiy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %loy(s32)
+ $x11 = COPY %hiy(s32)
PseudoRET implicit $x10, implicit $x11
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-shl.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-shl.mir
index 26ee2fca40b271..bc18361555c5fa 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-shl.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-shl.mir
@@ -89,21 +89,21 @@ name: shl_i48
body: |
bb.0.entry:
; CHECK-LABEL: name: shl_i48
- ; CHECK: %xhi:_(s32) = COPY $x10
- ; CHECK-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-NEXT: %yhi:_(s32) = COPY $x12
+ ; CHECK: %xlo:_(s32) = COPY $x10
+ ; CHECK-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-NEXT: %ylo:_(s32) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %yhi, [[C]]
- ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], %yhi
+ ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %ylo, [[C]]
+ ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], %ylo
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %yhi(s32), [[C]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %yhi(s32), [[C1]]
- ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %xhi, %yhi(s32)
- ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %xhi, [[SUB1]](s32)
- ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL %xlo, %yhi(s32)
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %ylo(s32), [[C]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %ylo(s32), [[C1]]
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %xlo, %ylo(s32)
+ ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %xlo, [[SUB1]](s32)
+ ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL %xhi, %ylo(s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL1]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL %xhi, [[SUB]](s32)
+ ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL %xlo, [[SUB]](s32)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP]], [[C3]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[SHL]], [[C2]]
@@ -112,23 +112,23 @@ body: |
; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), [[OR]], [[SHL2]]
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C5]]
- ; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), %xlo, [[SELECT1]]
+ ; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), %xhi, [[SELECT1]]
; CHECK-NEXT: $x10 = COPY [[SELECT]](s32)
; CHECK-NEXT: $x11 = COPY [[SELECT2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s32) = COPY $x10
- %xlo:_(s32) = COPY $x11
- %yhi:_(s32) = COPY $x12
- %ylo:_(s32) = COPY $x13
- %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
- %y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
+ %xlo:_(s32) = COPY $x10
+ %xhi:_(s32) = COPY $x11
+ %ylo:_(s32) = COPY $x12
+ %yhi:_(s32) = COPY $x13
+ %x0:_(s64) = G_MERGE_VALUES %xlo(s32), %xhi(s32)
+ %y0:_(s64) = G_MERGE_VALUES %ylo(s32), %yhi(s32)
%x:_(s48) = G_TRUNC %x0(s64)
%y:_(s48) = G_TRUNC %y0(s64)
%z:_(s48) = G_SHL %x, %y
%z0:_(s64) = G_ANYEXT %z(s48)
- %zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
- $x10 = COPY %zhi(s32)
- $x11 = COPY %zlo(s32)
+ %zlo:_(s32), %zhi:_(s32) = G_UNMERGE_VALUES %z0(s64)
+ $x10 = COPY %zlo(s32)
+ $x11 = COPY %zhi(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -137,21 +137,21 @@ name: shl_i64
body: |
bb.0.entry:
; CHECK-LABEL: name: shl_i64
- ; CHECK: %hi1:_(s32) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
+ ; CHECK: %lo1:_(s32) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %hi2, [[C]]
- ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], %hi2
+ ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %lo2, [[C]]
+ ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], %lo2
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %hi2(s32), [[C]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %hi2(s32), [[C1]]
- ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %hi1, %hi2(s32)
- ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %hi1, [[SUB1]](s32)
- ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL %lo1, %hi2(s32)
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %lo2(s32), [[C]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %lo2(s32), [[C1]]
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %lo1, %lo2(s32)
+ ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %lo1, [[SUB1]](s32)
+ ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL %hi1, %lo2(s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL1]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL %hi1, [[SUB]](s32)
+ ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL %lo1, [[SUB]](s32)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP]], [[C3]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[SHL]], [[C2]]
@@ -160,20 +160,20 @@ body: |
; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[AND1]](s32), [[OR]], [[SHL2]]
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C5]]
- ; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), %lo1, [[SELECT1]]
+ ; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[AND2]](s32), %hi1, [[SELECT1]]
; CHECK-NEXT: $x10 = COPY [[SELECT]](s32)
; CHECK-NEXT: $x11 = COPY [[SELECT2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s32) = COPY $x10
- %lo1:_(s32) = COPY $x11
- %hi2:_(s32) = COPY $x12
- %lo2:_(s32) = COPY $x13
- %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
- %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %lo1:_(s32) = COPY $x10
+ %hi1:_(s32) = COPY $x11
+ %lo2:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %lo1(s32), %hi1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %lo2(s32), %hi2(s32)
%y:_(s64) = G_SHL %x1, %x2
- %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
- $x10 = COPY %hiy(s32)
- $x11 = COPY %loy(s32)
+ %loy:_(s32), %hiy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %loy(s32)
+ $x11 = COPY %hiy(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -182,28 +182,28 @@ name: shl_i96
body: |
bb.0.entry:
; CHECK-LABEL: name: shl_i96
- ; CHECK: %hi1:_(s32) = COPY $x10
+ ; CHECK: %lo1:_(s32) = COPY $x10
; CHECK-NEXT: %mid1:_(s32) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 64
- ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %hi2, [[C]]
- ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], %hi2
+ ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB %lo2, [[C]]
+ ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], %lo2
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %hi2(s32), [[C]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %hi2(s32), [[C1]]
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %lo2(s32), [[C]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %lo2(s32), [[C1]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; CHECK-NEXT: [[SUB2:%[0-9]+]]:_(s32) = G_SUB %hi2, [[C2]]
- ; CHECK-NEXT: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C2]], %hi2
+ ; CHECK-NEXT: [[SUB2:%[0-9]+]]:_(s32) = G_SUB %lo2, [[C2]]
+ ; CHECK-NEXT: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C2]], %lo2
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %hi2(s32), [[C2]]
- ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %hi2(s32), [[C3]]
- ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %hi1, %hi2(s32)
- ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %hi1, [[SUB3]](s32)
- ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL %mid1, %hi2(s32)
+ ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %lo2(s32), [[C2]]
+ ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), %lo2(s32), [[C3]]
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL %lo1, %lo2(s32)
+ ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR %lo1, [[SUB3]](s32)
+ ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL %mid1, %lo2(s32)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL1]]
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
- ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL %hi1, [[SUB2]](s32)
+ ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL %lo1, [[SUB2]](s32)
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP2]], [[C5]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[SHL]], [[C4]]
@@ -219,7 +219,7 @@ body: |
; CHECK-NEXT: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[SUB1]](s32), [[C8]]
; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[SUB1]](s32), [[C9]]
- ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR %hi1, [[SUB1]](s32)
+ ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR %lo1, [[SUB1]](s32)
; CHECK-NEXT: [[SHL3:%[0-9]+]]:_(s32) = G_SHL %mid1, [[SUB5]](s32)
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[LSHR1]], [[SHL3]]
; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR %mid1, [[SUB4]](s32)
@@ -228,10 +228,10 @@ body: |
; CHECK-NEXT: [[SELECT3:%[0-9]+]]:_(s32) = G_SELECT [[AND3]](s32), [[OR1]], [[LSHR2]]
; CHECK-NEXT: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s32) = G_AND [[ICMP5]], [[C11]]
- ; CHECK-NEXT: [[SELECT4:%[0-9]+]]:_(s32) = G_SELECT [[AND4]](s32), %hi1, [[SELECT3]]
+ ; CHECK-NEXT: [[SELECT4:%[0-9]+]]:_(s32) = G_SELECT [[AND4]](s32), %lo1, [[SELECT3]]
; CHECK-NEXT: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
- ; CHECK-NEXT: [[ICMP6:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %hi2(s32), [[C12]]
- ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s32) = G_SHL %lo1, %hi2(s32)
+ ; CHECK-NEXT: [[ICMP6:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), %lo2(s32), [[C12]]
+ ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s32) = G_SHL %hi1, %lo2(s32)
; CHECK-NEXT: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s32) = G_AND [[ICMP6]], [[C14]]
@@ -241,7 +241,7 @@ body: |
; CHECK-NEXT: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
; CHECK-NEXT: [[ICMP7:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[SUB]](s32), [[C17]]
- ; CHECK-NEXT: [[SHL5:%[0-9]+]]:_(s32) = G_SHL %hi1, [[SUB]](s32)
+ ; CHECK-NEXT: [[SHL5:%[0-9]+]]:_(s32) = G_SHL %lo1, [[SUB]](s32)
; CHECK-NEXT: [[C18:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK-NEXT: [[C19:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND6:%[0-9]+]]:_(s32) = G_AND [[ICMP7]], [[C19]]
@@ -257,24 +257,24 @@ body: |
; CHECK-NEXT: [[SELECT9:%[0-9]+]]:_(s32) = G_SELECT [[AND9]](s32), [[OR2]], [[SELECT6]]
; CHECK-NEXT: [[C23:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND10:%[0-9]+]]:_(s32) = G_AND [[ICMP1]], [[C23]]
- ; CHECK-NEXT: [[SELECT10:%[0-9]+]]:_(s32) = G_SELECT [[AND10]](s32), %lo1, [[SELECT9]]
+ ; CHECK-NEXT: [[SELECT10:%[0-9]+]]:_(s32) = G_SELECT [[AND10]](s32), %hi1, [[SELECT9]]
; CHECK-NEXT: $x10 = COPY [[SELECT7]](s32)
; CHECK-NEXT: $x11 = COPY [[SELECT8]](s32)
; CHECK-NEXT: $x12 = COPY [[SELECT10]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s32) = COPY $x10
+ %lo1:_(s32) = COPY $x10
%mid1:_(s32) = COPY $x11
- %lo1:_(s32) = COPY $x12
- %hi2:_(s32) = COPY $x13
+ %hi1:_(s32) = COPY $x12
+ %lo2:_(s32) = COPY $x13
%mid2:_(s32) = COPY $x14
- %lo2:_(s32) = COPY $x15
- %x1:_(s96) = G_MERGE_VALUES %hi1(s32), %mid1(s32), %lo1(s32)
- %x2:_(s96) = G_MERGE_VALUES %hi2(s32), %mid2(s32), %lo2(s32)
+ %hi2:_(s32) = COPY $x15
+ %x1:_(s96) = G_MERGE_VALUES %lo1(s32), %mid1(s32), %hi1(s32)
+ %x2:_(s96) = G_MERGE_VALUES %lo2(s32), %mid2(s32), %hi2(s32)
%y:_(s96) = G_SHL %x1, %x2
- %hi:_(s32), %mid:_(s32), %lo:_(s32) = G_UNMERGE_VALUES %y(s96)
- $x10 = COPY %hi(s32)
+ %lo:_(s32), %mid:_(s32), %hi:_(s32) = G_UNMERGE_VALUES %y(s96)
+ $x10 = COPY %lo(s32)
$x11 = COPY %mid(s32)
- $x12 = COPY %lo(s32)
+ $x12 = COPY %hi(s32)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-sub.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-sub.mir
index b5de8b6ab63183..ea4b1f200f4486 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-sub.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-sub.mir
@@ -83,30 +83,30 @@ name: sub_i48
body: |
bb.0.entry:
; CHECK-LABEL: name: sub_i48
- ; CHECK: %xhi:_(s32) = COPY $x10
- ; CHECK-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-NEXT: %yhi:_(s32) = COPY $x12
- ; CHECK-NEXT: %ylo:_(s32) = COPY $x13
- ; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s32) = G_USUBO %xhi, %yhi
+ ; CHECK: %xlo:_(s32) = COPY $x10
+ ; CHECK-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-NEXT: %ylo:_(s32) = COPY $x12
+ ; CHECK-NEXT: %yhi:_(s32) = COPY $x13
+ ; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s32) = G_USUBO %xlo, %ylo
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[USUBO1]], [[C]]
- ; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s32) = G_USUBE %xlo, %ylo, [[AND]]
+ ; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s32) = G_USUBE %xhi, %yhi, [[AND]]
; CHECK-NEXT: $x10 = COPY [[USUBO]](s32)
; CHECK-NEXT: $x11 = COPY [[USUBE]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s32) = COPY $x10
- %xlo:_(s32) = COPY $x11
- %yhi:_(s32) = COPY $x12
- %ylo:_(s32) = COPY $x13
- %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
- %y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
+ %xlo:_(s32) = COPY $x10
+ %xhi:_(s32) = COPY $x11
+ %ylo:_(s32) = COPY $x12
+ %yhi:_(s32) = COPY $x13
+ %x0:_(s64) = G_MERGE_VALUES %xlo(s32), %xhi(s32)
+ %y0:_(s64) = G_MERGE_VALUES %ylo(s32), %yhi(s32)
%x:_(s48) = G_TRUNC %x0(s64)
%y:_(s48) = G_TRUNC %y0(s64)
%z:_(s48) = G_SUB %x, %y
%z0:_(s64) = G_ANYEXT %z(s48)
- %zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
- $x10 = COPY %zhi(s32)
- $x11 = COPY %zlo(s32)
+ %zlo:_(s32), %zhi:_(s32) = G_UNMERGE_VALUES %z0(s64)
+ $x10 = COPY %zlo(s32)
+ $x11 = COPY %zhi(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -115,27 +115,27 @@ name: sub_i64
body: |
bb.0.entry:
; CHECK-LABEL: name: sub_i64
- ; CHECK: %hi1:_(s32) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
- ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
- ; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s32) = G_USUBO %hi1, %hi2
+ ; CHECK: %lo1:_(s32) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s32) = G_USUBO %lo1, %lo2
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[USUBO1]], [[C]]
- ; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s32) = G_USUBE %lo1, %lo2, [[AND]]
+ ; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s32) = G_USUBE %hi1, %hi2, [[AND]]
; CHECK-NEXT: $x10 = COPY [[USUBO]](s32)
; CHECK-NEXT: $x11 = COPY [[USUBE]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s32) = COPY $x10
- %lo1:_(s32) = COPY $x11
- %hi2:_(s32) = COPY $x12
- %lo2:_(s32) = COPY $x13
- %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
- %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %lo1:_(s32) = COPY $x10
+ %hi1:_(s32) = COPY $x11
+ %lo2:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %lo1(s32), %hi1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %lo2(s32), %hi2(s32)
%y:_(s64) = G_SUB %x1, %x2
- %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
- $x10 = COPY %hiy(s32)
- $x11 = COPY %loy(s32)
+ %loy:_(s32), %hiy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %loy(s32)
+ $x11 = COPY %hiy(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -144,36 +144,36 @@ name: sub_i96
body: |
bb.0.entry:
; CHECK-LABEL: name: sub_i96
- ; CHECK: %hi1:_(s32) = COPY $x10
+ ; CHECK: %lo1:_(s32) = COPY $x10
; CHECK-NEXT: %mid1:_(s32) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
; CHECK-NEXT: %mid2:_(s32) = COPY $x14
- ; CHECK-NEXT: %lo2:_(s32) = COPY $x15
- ; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s32) = G_USUBO %hi1, %hi2
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x15
+ ; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s32) = G_USUBO %lo1, %lo2
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[USUBO1]], [[C]]
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s32) = G_USUBE %mid1, %mid2, [[AND]]
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[USUBE1]], [[C1]]
- ; CHECK-NEXT: [[USUBE2:%[0-9]+]]:_(s32), [[USUBE3:%[0-9]+]]:_(s32) = G_USUBE %lo1, %lo2, [[AND1]]
+ ; CHECK-NEXT: [[USUBE2:%[0-9]+]]:_(s32), [[USUBE3:%[0-9]+]]:_(s32) = G_USUBE %hi1, %hi2, [[AND1]]
; CHECK-NEXT: $x10 = COPY [[USUBO]](s32)
; CHECK-NEXT: $x11 = COPY [[USUBE]](s32)
; CHECK-NEXT: $x12 = COPY [[USUBE2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s32) = COPY $x10
+ %lo1:_(s32) = COPY $x10
%mid1:_(s32) = COPY $x11
- %lo1:_(s32) = COPY $x12
- %hi2:_(s32) = COPY $x13
+ %hi1:_(s32) = COPY $x12
+ %lo2:_(s32) = COPY $x13
%mid2:_(s32) = COPY $x14
- %lo2:_(s32) = COPY $x15
- %x1:_(s96) = G_MERGE_VALUES %hi1(s32), %mid1(s32), %lo1(s32)
- %x2:_(s96) = G_MERGE_VALUES %hi2(s32), %mid2(s32), %lo2(s32)
+ %hi2:_(s32) = COPY $x15
+ %x1:_(s96) = G_MERGE_VALUES %lo1(s32), %mid1(s32), %hi1(s32)
+ %x2:_(s96) = G_MERGE_VALUES %lo2(s32), %mid2(s32), %hi2(s32)
%y:_(s96) = G_SUB %x1, %x2
- %hi:_(s32), %mid:_(s32), %lo:_(s32) = G_UNMERGE_VALUES %y(s96)
- $x10 = COPY %hi(s32)
+ %lo:_(s32), %mid:_(s32), %hi:_(s32) = G_UNMERGE_VALUES %y(s96)
+ $x10 = COPY %lo(s32)
$x11 = COPY %mid(s32)
- $x12 = COPY %lo(s32)
+ $x12 = COPY %hi(s32)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir
index efd5408be76435..c0ba3e95da9cde 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-xor.mir
@@ -83,28 +83,28 @@ name: xor_i48
body: |
bb.0.entry:
; CHECK-LABEL: name: xor_i48
- ; CHECK: %xhi:_(s32) = COPY $x10
- ; CHECK-NEXT: %xlo:_(s32) = COPY $x11
- ; CHECK-NEXT: %yhi:_(s32) = COPY $x12
- ; CHECK-NEXT: %ylo:_(s32) = COPY $x13
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR %xhi, %yhi
- ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR %xlo, %ylo
+ ; CHECK: %xlo:_(s32) = COPY $x10
+ ; CHECK-NEXT: %xhi:_(s32) = COPY $x11
+ ; CHECK-NEXT: %ylo:_(s32) = COPY $x12
+ ; CHECK-NEXT: %yhi:_(s32) = COPY $x13
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR %xlo, %ylo
+ ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR %xhi, %yhi
; CHECK-NEXT: $x10 = COPY [[XOR]](s32)
; CHECK-NEXT: $x11 = COPY [[XOR1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s32) = COPY $x10
- %xlo:_(s32) = COPY $x11
- %yhi:_(s32) = COPY $x12
- %ylo:_(s32) = COPY $x13
- %x0:_(s64) = G_MERGE_VALUES %xhi(s32), %xlo(s32)
- %y0:_(s64) = G_MERGE_VALUES %yhi(s32), %ylo(s32)
+ %xlo:_(s32) = COPY $x10
+ %xhi:_(s32) = COPY $x11
+ %ylo:_(s32) = COPY $x12
+ %yhi:_(s32) = COPY $x13
+ %x0:_(s64) = G_MERGE_VALUES %xlo(s32), %xhi(s32)
+ %y0:_(s64) = G_MERGE_VALUES %ylo(s32), %yhi(s32)
%x:_(s48) = G_TRUNC %x0(s64)
%y:_(s48) = G_TRUNC %y0(s64)
%z:_(s48) = G_XOR %x, %y
%z0:_(s64) = G_ANYEXT %z(s48)
- %zhi:_(s32), %zlo:_(s32) = G_UNMERGE_VALUES %z0(s64)
- $x10 = COPY %zhi(s32)
- $x11 = COPY %zlo(s32)
+ %zlo:_(s32), %zhi:_(s32) = G_UNMERGE_VALUES %z0(s64)
+ $x10 = COPY %zlo(s32)
+ $x11 = COPY %zhi(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -113,25 +113,25 @@ name: xor_i64
body: |
bb.0.entry:
; CHECK-LABEL: name: xor_i64
- ; CHECK: %hi1:_(s32) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x12
- ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR %hi1, %hi2
- ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR %lo1, %lo2
+ ; CHECK: %lo1:_(s32) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR %lo1, %lo2
+ ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR %hi1, %hi2
; CHECK-NEXT: $x10 = COPY [[XOR]](s32)
; CHECK-NEXT: $x11 = COPY [[XOR1]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s32) = COPY $x10
- %lo1:_(s32) = COPY $x11
- %hi2:_(s32) = COPY $x12
- %lo2:_(s32) = COPY $x13
- %x1:_(s64) = G_MERGE_VALUES %hi1(s32), %lo1(s32)
- %x2:_(s64) = G_MERGE_VALUES %hi2(s32), %lo2(s32)
+ %lo1:_(s32) = COPY $x10
+ %hi1:_(s32) = COPY $x11
+ %lo2:_(s32) = COPY $x12
+ %hi2:_(s32) = COPY $x13
+ %x1:_(s64) = G_MERGE_VALUES %lo1(s32), %hi1(s32)
+ %x2:_(s64) = G_MERGE_VALUES %lo2(s32), %hi2(s32)
%y:_(s64) = G_XOR %x1, %x2
- %hiy:_(s32), %loy:_(s32) = G_UNMERGE_VALUES %y(s64)
- $x10 = COPY %hiy(s32)
- $x11 = COPY %loy(s32)
+ %loy:_(s32), %hiy:_(s32) = G_UNMERGE_VALUES %y(s64)
+ $x10 = COPY %loy(s32)
+ $x11 = COPY %hiy(s32)
PseudoRET implicit $x10, implicit $x11
...
@@ -140,32 +140,32 @@ name: xor_i96
body: |
bb.0.entry:
; CHECK-LABEL: name: xor_i96
- ; CHECK: %hi1:_(s32) = COPY $x10
+ ; CHECK: %lo1:_(s32) = COPY $x10
; CHECK-NEXT: %mid1:_(s32) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s32) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s32) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s32) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s32) = COPY $x13
; CHECK-NEXT: %mid2:_(s32) = COPY $x14
- ; CHECK-NEXT: %lo2:_(s32) = COPY $x15
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR %hi1, %hi2
+ ; CHECK-NEXT: %hi2:_(s32) = COPY $x15
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR %lo1, %lo2
; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR %mid1, %mid2
- ; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s32) = G_XOR %lo1, %lo2
+ ; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s32) = G_XOR %hi1, %hi2
; CHECK-NEXT: $x10 = COPY [[XOR]](s32)
; CHECK-NEXT: $x11 = COPY [[XOR1]](s32)
; CHECK-NEXT: $x12 = COPY [[XOR2]](s32)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s32) = COPY $x10
+ %lo1:_(s32) = COPY $x10
%mid1:_(s32) = COPY $x11
- %lo1:_(s32) = COPY $x12
- %hi2:_(s32) = COPY $x13
+ %hi1:_(s32) = COPY $x12
+ %lo2:_(s32) = COPY $x13
%mid2:_(s32) = COPY $x14
- %lo2:_(s32) = COPY $x15
- %x1:_(s96) = G_MERGE_VALUES %hi1(s32), %mid1(s32), %lo1(s32)
- %x2:_(s96) = G_MERGE_VALUES %hi2(s32), %mid2(s32), %lo2(s32)
+ %hi2:_(s32) = COPY $x15
+ %x1:_(s96) = G_MERGE_VALUES %lo1(s32), %mid1(s32), %hi1(s32)
+ %x2:_(s96) = G_MERGE_VALUES %lo2(s32), %mid2(s32), %hi2(s32)
%y:_(s96) = G_XOR %x1, %x2
- %hi:_(s32), %mid:_(s32), %lo:_(s32) = G_UNMERGE_VALUES %y(s96)
- $x10 = COPY %hi(s32)
+ %lo:_(s32), %mid:_(s32), %hi:_(s32) = G_UNMERGE_VALUES %y(s96)
+ $x10 = COPY %lo(s32)
$x11 = COPY %mid(s32)
- $x12 = COPY %lo(s32)
+ $x12 = COPY %hi(s32)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-add.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-add.mir
index ac9ce7668e6d69..2e40331779b70e 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-add.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-add.mir
@@ -135,27 +135,27 @@ name: add_i128
body: |
bb.0.entry:
; CHECK-LABEL: name: add_i128
- ; CHECK: %hi1:_(s64) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x12
- ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
- ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s64) = G_UADDO %hi1, %hi2
+ ; CHECK: %lo1:_(s64) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s64) = G_UADDO %lo1, %lo2
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[UADDO1]], [[C]]
- ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s64) = G_UADDE %lo1, %lo2, [[AND]]
+ ; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s64) = G_UADDE %hi1, %hi2, [[AND]]
; CHECK-NEXT: $x10 = COPY [[UADDO]](s64)
; CHECK-NEXT: $x11 = COPY [[UADDE]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s64) = COPY $x10
- %lo1:_(s64) = COPY $x11
- %hi2:_(s64) = COPY $x12
- %lo2:_(s64) = COPY $x13
- %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
- %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %lo1:_(s64) = COPY $x10
+ %hi1:_(s64) = COPY $x11
+ %lo2:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %lo1(s64), %hi1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %lo2(s64), %hi2(s64)
%y:_(s128) = G_ADD %x1, %x2
- %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
- $x10 = COPY %hiy(s64)
- $x11 = COPY %loy(s64)
+ %loy:_(s64), %hiy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %loy(s64)
+ $x11 = COPY %hiy(s64)
PseudoRET implicit $x10, implicit $x11
...
@@ -164,36 +164,36 @@ name: add_i192
body: |
bb.0.entry:
; CHECK-LABEL: name: add_i192
- ; CHECK: %hi1:_(s64) = COPY $x10
+ ; CHECK: %lo1:_(s64) = COPY $x10
; CHECK-NEXT: %mid1:_(s64) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
; CHECK-NEXT: %mid2:_(s64) = COPY $x14
- ; CHECK-NEXT: %lo2:_(s64) = COPY $x15
- ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s64) = G_UADDO %hi1, %hi2
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x15
+ ; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s64) = G_UADDO %lo1, %lo2
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[UADDO1]], [[C]]
; CHECK-NEXT: [[UADDE:%[0-9]+]]:_(s64), [[UADDE1:%[0-9]+]]:_(s64) = G_UADDE %mid1, %mid2, [[AND]]
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UADDE1]], [[C1]]
- ; CHECK-NEXT: [[UADDE2:%[0-9]+]]:_(s64), [[UADDE3:%[0-9]+]]:_(s64) = G_UADDE %lo1, %lo2, [[AND1]]
+ ; CHECK-NEXT: [[UADDE2:%[0-9]+]]:_(s64), [[UADDE3:%[0-9]+]]:_(s64) = G_UADDE %hi1, %hi2, [[AND1]]
; CHECK-NEXT: $x10 = COPY [[UADDO]](s64)
; CHECK-NEXT: $x11 = COPY [[UADDE]](s64)
; CHECK-NEXT: $x12 = COPY [[UADDE2]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s64) = COPY $x10
+ %lo1:_(s64) = COPY $x10
%mid1:_(s64) = COPY $x11
- %lo1:_(s64) = COPY $x12
- %hi2:_(s64) = COPY $x13
+ %hi1:_(s64) = COPY $x12
+ %lo2:_(s64) = COPY $x13
%mid2:_(s64) = COPY $x14
- %lo2:_(s64) = COPY $x15
- %x1:_(s192) = G_MERGE_VALUES %hi1(s64), %mid1(s64), %lo1(s64)
- %x2:_(s192) = G_MERGE_VALUES %hi2(s64), %mid2(s64), %lo2(s64)
+ %hi2:_(s64) = COPY $x15
+ %x1:_(s192) = G_MERGE_VALUES %lo1(s64), %mid1(s64), %hi1(s64)
+ %x2:_(s192) = G_MERGE_VALUES %lo2(s64), %mid2(s64), %hi2(s64)
%y:_(s192) = G_ADD %x1, %x2
- %hi:_(s64), %mid:_(s64), %lo:_(s64) = G_UNMERGE_VALUES %y(s192)
- $x10 = COPY %hi(s64)
+ %lo:_(s64), %mid:_(s64), %hi:_(s64) = G_UNMERGE_VALUES %y(s192)
+ $x10 = COPY %lo(s64)
$x11 = COPY %mid(s64)
- $x12 = COPY %lo(s64)
+ $x12 = COPY %hi(s64)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir
index ac6cee0b5e4cba..f7802eb3b6b2f8 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-and.mir
@@ -133,25 +133,25 @@ name: and_i128
body: |
bb.0.entry:
; CHECK-LABEL: name: and_i128
- ; CHECK: %hi1:_(s64) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x12
- ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %hi1, %hi2
- ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND %lo1, %lo2
+ ; CHECK: %lo1:_(s64) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %lo1, %lo2
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND %hi1, %hi2
; CHECK-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-NEXT: $x11 = COPY [[AND1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s64) = COPY $x10
- %lo1:_(s64) = COPY $x11
- %hi2:_(s64) = COPY $x12
- %lo2:_(s64) = COPY $x13
- %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
- %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %lo1:_(s64) = COPY $x10
+ %hi1:_(s64) = COPY $x11
+ %lo2:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %lo1(s64), %hi1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %lo2(s64), %hi2(s64)
%y:_(s128) = G_AND %x1, %x2
- %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
- $x10 = COPY %hiy(s64)
- $x11 = COPY %loy(s64)
+ %loy:_(s64), %hiy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %loy(s64)
+ $x11 = COPY %hiy(s64)
PseudoRET implicit $x10, implicit $x11
...
@@ -160,32 +160,32 @@ name: and_i192
body: |
bb.0.entry:
; CHECK-LABEL: name: and_i192
- ; CHECK: %hi1:_(s64) = COPY $x10
+ ; CHECK: %lo1:_(s64) = COPY $x10
; CHECK-NEXT: %mid1:_(s64) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
; CHECK-NEXT: %mid2:_(s64) = COPY $x14
- ; CHECK-NEXT: %lo2:_(s64) = COPY $x15
- ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %hi1, %hi2
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x15
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %lo1, %lo2
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND %mid1, %mid2
- ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND %lo1, %lo2
+ ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND %hi1, %hi2
; CHECK-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-NEXT: $x11 = COPY [[AND1]](s64)
; CHECK-NEXT: $x12 = COPY [[AND2]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s64) = COPY $x10
+ %lo1:_(s64) = COPY $x10
%mid1:_(s64) = COPY $x11
- %lo1:_(s64) = COPY $x12
- %hi2:_(s64) = COPY $x13
+ %hi1:_(s64) = COPY $x12
+ %lo2:_(s64) = COPY $x13
%mid2:_(s64) = COPY $x14
- %lo2:_(s64) = COPY $x15
- %x1:_(s192) = G_MERGE_VALUES %hi1(s64), %mid1(s64), %lo1(s64)
- %x2:_(s192) = G_MERGE_VALUES %hi2(s64), %mid2(s64), %lo2(s64)
+ %hi2:_(s64) = COPY $x15
+ %x1:_(s192) = G_MERGE_VALUES %lo1(s64), %mid1(s64), %hi1(s64)
+ %x2:_(s192) = G_MERGE_VALUES %lo2(s64), %mid2(s64), %hi2(s64)
%y:_(s192) = G_AND %x1, %x2
- %hi:_(s64), %mid:_(s64), %lo:_(s64) = G_UNMERGE_VALUES %y(s192)
- $x10 = COPY %hi(s64)
+ %lo:_(s64), %mid:_(s64), %hi:_(s64) = G_UNMERGE_VALUES %y(s192)
+ $x10 = COPY %lo(s64)
$x11 = COPY %mid(s64)
- $x12 = COPY %lo(s64)
+ $x12 = COPY %hi(s64)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-ashr.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-ashr.mir
index 2bb006df9a2c74..3785813364702f 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-ashr.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-ashr.mir
@@ -165,44 +165,44 @@ name: ashr_i128
body: |
bb.0.entry:
; CHECK-LABEL: name: ashr_i128
- ; CHECK: %hi1:_(s64) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x12
+ ; CHECK: %lo1:_(s64) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
- ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB %hi2, [[C]]
- ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C]], %hi2
+ ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB %lo2, [[C]]
+ ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C]], %lo2
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %hi2(s64), [[C]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %hi2(s64), [[C1]]
- ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR %lo1, %hi2(s64)
- ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR %hi1, %hi2(s64)
- ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %lo1, [[SUB1]](s64)
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %lo2(s64), [[C]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %lo2(s64), [[C1]]
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR %hi1, %lo2(s64)
+ ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR %lo1, %lo2(s64)
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %hi1, [[SUB1]](s64)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 63
- ; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR %lo1, [[C2]](s64)
- ; CHECK-NEXT: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR %lo1, [[SUB]](s64)
+ ; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR %hi1, [[C2]](s64)
+ ; CHECK-NEXT: [[ASHR2:%[0-9]+]]:_(s64) = G_ASHR %hi1, [[SUB]](s64)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ICMP]], [[C3]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s64), [[OR]], [[ASHR2]]
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C4]]
- ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[AND1]](s64), %hi1, [[SELECT]]
+ ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[AND1]](s64), %lo1, [[SELECT]]
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[ICMP]], [[C5]]
; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[AND2]](s64), [[ASHR]], [[ASHR1]]
; CHECK-NEXT: $x10 = COPY [[SELECT1]](s64)
; CHECK-NEXT: $x11 = COPY [[SELECT2]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s64) = COPY $x10
- %lo1:_(s64) = COPY $x11
- %hi2:_(s64) = COPY $x12
- %lo2:_(s64) = COPY $x13
- %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
- %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %lo1:_(s64) = COPY $x10
+ %hi1:_(s64) = COPY $x11
+ %lo2:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %lo1(s64), %hi1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %lo2(s64), %hi2(s64)
%y:_(s128) = G_ASHR %x1, %x2
- %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
- $x10 = COPY %hiy(s64)
- $x11 = COPY %loy(s64)
+ %loy:_(s64), %hiy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %loy(s64)
+ $x11 = COPY %hiy(s64)
PseudoRET implicit $x10, implicit $x11
...
@@ -211,25 +211,25 @@ name: ashr_i192
body: |
bb.0.entry:
; CHECK-LABEL: name: ashr_i192
- ; CHECK: %hi1:_(s64) = COPY $x10
+ ; CHECK: %lo1:_(s64) = COPY $x10
; CHECK-NEXT: %mid1:_(s64) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 63
- ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR %lo1, [[C]](s64)
+ ; CHECK-NEXT: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR %hi1, [[C]](s64)
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 128
- ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB %hi2, [[C1]]
- ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C1]], %hi2
+ ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB %lo2, [[C1]]
+ ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C1]], %lo2
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %hi2(s64), [[C1]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %hi2(s64), [[C2]]
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %lo2(s64), [[C1]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %lo2(s64), [[C2]]
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
- ; CHECK-NEXT: [[SUB2:%[0-9]+]]:_(s64) = G_SUB %hi2, [[C3]]
- ; CHECK-NEXT: [[SUB3:%[0-9]+]]:_(s64) = G_SUB [[C3]], %hi2
+ ; CHECK-NEXT: [[SUB2:%[0-9]+]]:_(s64) = G_SUB %lo2, [[C3]]
+ ; CHECK-NEXT: [[SUB3:%[0-9]+]]:_(s64) = G_SUB [[C3]], %lo2
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %hi2(s64), [[C3]]
- ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %hi2(s64), [[C4]]
- ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR %lo1, %hi2(s64)
+ ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %lo2(s64), [[C3]]
+ ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %lo2(s64), [[C4]]
+ ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR %hi1, %lo2(s64)
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[ASHR]], [[SUB3]](s64)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL]]
; CHECK-NEXT: [[ASHR1:%[0-9]+]]:_(s64) = G_ASHR [[ASHR]], [[SUB2]](s64)
@@ -238,15 +238,15 @@ body: |
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s64), [[OR]], [[ASHR1]]
; CHECK-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ICMP3]], [[C6]]
- ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[AND1]](s64), %lo1, [[SELECT]]
+ ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[AND1]](s64), %hi1, [[SELECT]]
; CHECK-NEXT: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
- ; CHECK-NEXT: [[SUB4:%[0-9]+]]:_(s64) = G_SUB %hi2, [[C7]]
- ; CHECK-NEXT: [[SUB5:%[0-9]+]]:_(s64) = G_SUB [[C7]], %hi2
+ ; CHECK-NEXT: [[SUB4:%[0-9]+]]:_(s64) = G_SUB %lo2, [[C7]]
+ ; CHECK-NEXT: [[SUB5:%[0-9]+]]:_(s64) = G_SUB [[C7]], %lo2
; CHECK-NEXT: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %hi2(s64), [[C7]]
- ; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %hi2(s64), [[C8]]
- ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR %mid1, %hi2(s64)
- ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR %hi1, %hi2(s64)
+ ; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %lo2(s64), [[C7]]
+ ; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %lo2(s64), [[C8]]
+ ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR %mid1, %lo2(s64)
+ ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR %lo1, %lo2(s64)
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL %mid1, [[SUB5]](s64)
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[LSHR2]], [[SHL1]]
; CHECK-NEXT: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
@@ -256,7 +256,7 @@ body: |
; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[AND2]](s64), [[OR1]], [[LSHR3]]
; CHECK-NEXT: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[ICMP5]], [[C11]]
- ; CHECK-NEXT: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[AND3]](s64), %hi1, [[SELECT2]]
+ ; CHECK-NEXT: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[AND3]](s64), %lo1, [[SELECT2]]
; CHECK-NEXT: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s64) = G_AND [[ICMP4]], [[C12]]
; CHECK-NEXT: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[AND4]](s64), [[LSHR1]], [[C9]]
@@ -266,12 +266,12 @@ body: |
; CHECK-NEXT: [[C14:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: [[ICMP6:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), [[SUB1]](s64), [[C13]]
; CHECK-NEXT: [[ICMP7:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[SUB1]](s64), [[C14]]
- ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s64) = G_SHL %lo1, [[SUB1]](s64)
- ; CHECK-NEXT: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR %lo1, [[SUB7]](s64)
+ ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s64) = G_SHL %hi1, [[SUB1]](s64)
+ ; CHECK-NEXT: [[LSHR4:%[0-9]+]]:_(s64) = G_LSHR %hi1, [[SUB7]](s64)
; CHECK-NEXT: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[ASHR]], [[SUB1]](s64)
; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s64) = G_OR [[LSHR4]], [[SHL3]]
; CHECK-NEXT: [[C15:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s64) = G_SHL %lo1, [[SUB6]](s64)
+ ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s64) = G_SHL %hi1, [[SUB6]](s64)
; CHECK-NEXT: [[C16:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s64) = G_AND [[ICMP6]], [[C16]]
; CHECK-NEXT: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[AND5]](s64), [[SHL2]], [[C15]]
@@ -292,7 +292,7 @@ body: |
; CHECK-NEXT: [[ICMP8:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), [[SUB]](s64), [[C20]]
; CHECK-NEXT: [[ICMP9:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[SUB]](s64), [[C21]]
; CHECK-NEXT: [[ASHR3:%[0-9]+]]:_(s64) = G_ASHR [[ASHR]], [[SUB]](s64)
- ; CHECK-NEXT: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR %lo1, [[SUB]](s64)
+ ; CHECK-NEXT: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR %hi1, [[SUB]](s64)
; CHECK-NEXT: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[ASHR]], [[SUB9]](s64)
; CHECK-NEXT: [[OR5:%[0-9]+]]:_(s64) = G_OR [[LSHR5]], [[SHL5]]
; CHECK-NEXT: [[C22:%[0-9]+]]:_(s64) = G_CONSTANT i64 63
@@ -303,7 +303,7 @@ body: |
; CHECK-NEXT: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[AND8]](s64), [[OR5]], [[ASHR5]]
; CHECK-NEXT: [[C24:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND9:%[0-9]+]]:_(s64) = G_AND [[ICMP9]], [[C24]]
- ; CHECK-NEXT: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[AND9]](s64), %lo1, [[SELECT8]]
+ ; CHECK-NEXT: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[AND9]](s64), %hi1, [[SELECT8]]
; CHECK-NEXT: [[C25:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND10:%[0-9]+]]:_(s64) = G_AND [[ICMP8]], [[C25]]
; CHECK-NEXT: [[SELECT10:%[0-9]+]]:_(s64) = G_SELECT [[AND10]](s64), [[ASHR3]], [[ASHR4]]
@@ -315,7 +315,7 @@ body: |
; CHECK-NEXT: [[SELECT12:%[0-9]+]]:_(s64) = G_SELECT [[AND12]](s64), [[OR4]], [[SELECT10]]
; CHECK-NEXT: [[C28:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND13:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C28]]
- ; CHECK-NEXT: [[SELECT13:%[0-9]+]]:_(s64) = G_SELECT [[AND13]](s64), %hi1, [[SELECT11]]
+ ; CHECK-NEXT: [[SELECT13:%[0-9]+]]:_(s64) = G_SELECT [[AND13]](s64), %lo1, [[SELECT11]]
; CHECK-NEXT: [[C29:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND14:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C29]]
; CHECK-NEXT: [[SELECT14:%[0-9]+]]:_(s64) = G_SELECT [[AND14]](s64), %mid1, [[SELECT12]]
@@ -326,19 +326,19 @@ body: |
; CHECK-NEXT: $x11 = COPY [[SELECT14]](s64)
; CHECK-NEXT: $x12 = COPY [[SELECT15]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s64) = COPY $x10
+ %lo1:_(s64) = COPY $x10
%mid1:_(s64) = COPY $x11
- %lo1:_(s64) = COPY $x12
- %hi2:_(s64) = COPY $x13
+ %hi1:_(s64) = COPY $x12
+ %lo2:_(s64) = COPY $x13
%mid2:_(s64) = COPY $x14
- %lo2:_(s64) = COPY $x15
- %x1:_(s192) = G_MERGE_VALUES %hi1(s64), %mid1(s64), %lo1(s64)
- %x2:_(s192) = G_MERGE_VALUES %hi2(s64), %mid2(s64), %lo2(s64)
+ %hi2:_(s64) = COPY $x15
+ %x1:_(s192) = G_MERGE_VALUES %lo1(s64), %mid1(s64), %hi1(s64)
+ %x2:_(s192) = G_MERGE_VALUES %lo2(s64), %mid2(s64), %hi2(s64)
%y:_(s192) = G_ASHR %x1, %x2
- %hi:_(s64), %mid:_(s64), %lo:_(s64) = G_UNMERGE_VALUES %y(s192)
- $x10 = COPY %hi(s64)
+ %lo:_(s64), %mid:_(s64), %hi:_(s64) = G_UNMERGE_VALUES %y(s192)
+ $x10 = COPY %lo(s64)
$x11 = COPY %mid(s64)
- $x12 = COPY %lo(s64)
+ $x12 = COPY %hi(s64)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-div.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-div.mir
index e4b75586310d78..018a229181fa42 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-div.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-div.mir
@@ -171,15 +171,15 @@ name: sdiv_i72
body: |
bb.0.entry:
; CHECK-I-LABEL: name: sdiv_i72
- ; CHECK-I: %xhi:_(s64) = COPY $x10
- ; CHECK-I-NEXT: %xlo:_(s64) = COPY $x11
- ; CHECK-I-NEXT: %yhi:_(s64) = COPY $x12
- ; CHECK-I-NEXT: %ylo:_(s64) = COPY $x13
- ; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %xlo, 8
- ; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %ylo, 8
- ; CHECK-I-NEXT: $x10 = COPY %xhi(s64)
+ ; CHECK-I: %xlo:_(s64) = COPY $x10
+ ; CHECK-I-NEXT: %xhi:_(s64) = COPY $x11
+ ; CHECK-I-NEXT: %ylo:_(s64) = COPY $x12
+ ; CHECK-I-NEXT: %yhi:_(s64) = COPY $x13
+ ; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %xhi, 8
+ ; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %yhi, 8
+ ; CHECK-I-NEXT: $x10 = COPY %xlo(s64)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG]](s64)
- ; CHECK-I-NEXT: $x12 = COPY %yhi(s64)
+ ; CHECK-I-NEXT: $x12 = COPY %ylo(s64)
; CHECK-I-NEXT: $x13 = COPY [[SEXT_INREG1]](s64)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
@@ -189,15 +189,15 @@ body: |
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
;
; CHECK-M-LABEL: name: sdiv_i72
- ; CHECK-M: %xhi:_(s64) = COPY $x10
- ; CHECK-M-NEXT: %xlo:_(s64) = COPY $x11
- ; CHECK-M-NEXT: %yhi:_(s64) = COPY $x12
- ; CHECK-M-NEXT: %ylo:_(s64) = COPY $x13
- ; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %xlo, 8
- ; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %ylo, 8
- ; CHECK-M-NEXT: $x10 = COPY %xhi(s64)
+ ; CHECK-M: %xlo:_(s64) = COPY $x10
+ ; CHECK-M-NEXT: %xhi:_(s64) = COPY $x11
+ ; CHECK-M-NEXT: %ylo:_(s64) = COPY $x12
+ ; CHECK-M-NEXT: %yhi:_(s64) = COPY $x13
+ ; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %xhi, 8
+ ; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %yhi, 8
+ ; CHECK-M-NEXT: $x10 = COPY %xlo(s64)
; CHECK-M-NEXT: $x11 = COPY [[SEXT_INREG]](s64)
- ; CHECK-M-NEXT: $x12 = COPY %yhi(s64)
+ ; CHECK-M-NEXT: $x12 = COPY %ylo(s64)
; CHECK-M-NEXT: $x13 = COPY [[SEXT_INREG1]](s64)
; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__divti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
@@ -205,19 +205,19 @@ body: |
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s64) = COPY $x10
- %xlo:_(s64) = COPY $x11
- %yhi:_(s64) = COPY $x12
- %ylo:_(s64) = COPY $x13
- %x0:_(s128) = G_MERGE_VALUES %xhi(s64), %xlo(s64)
- %y0:_(s128) = G_MERGE_VALUES %yhi(s64), %ylo(s64)
+ %xlo:_(s64) = COPY $x10
+ %xhi:_(s64) = COPY $x11
+ %ylo:_(s64) = COPY $x12
+ %yhi:_(s64) = COPY $x13
+ %x0:_(s128) = G_MERGE_VALUES %xlo(s64), %xhi(s64)
+ %y0:_(s128) = G_MERGE_VALUES %ylo(s64), %yhi(s64)
%x:_(s72) = G_TRUNC %x0
%y:_(s72) = G_TRUNC %y0
%z:_(s72) = G_SDIV %x, %y
%z0:_(s128) = G_ANYEXT %z
- %zhi:_(s64), %zlo:_(s64) = G_UNMERGE_VALUES %z0(s128)
- $x10 = COPY %zhi(s64)
- $x11 = COPY %zlo(s64)
+ %zlo:_(s64), %zhi:_(s64) = G_UNMERGE_VALUES %z0(s128)
+ $x10 = COPY %zlo(s64)
+ $x11 = COPY %zhi(s64)
PseudoRET implicit $x10, implicit $x11
...
@@ -226,14 +226,14 @@ name: sdiv_i128
body: |
bb.0.entry:
; CHECK-I-LABEL: name: sdiv_i128
- ; CHECK-I: %hi1:_(s64) = COPY $x10
- ; CHECK-I-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-I-NEXT: %hi2:_(s64) = COPY $x12
- ; CHECK-I-NEXT: %lo2:_(s64) = COPY $x13
- ; CHECK-I-NEXT: $x10 = COPY %hi1(s64)
- ; CHECK-I-NEXT: $x11 = COPY %lo1(s64)
- ; CHECK-I-NEXT: $x12 = COPY %hi2(s64)
- ; CHECK-I-NEXT: $x13 = COPY %lo2(s64)
+ ; CHECK-I: %lo1:_(s64) = COPY $x10
+ ; CHECK-I-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-I-NEXT: %lo2:_(s64) = COPY $x12
+ ; CHECK-I-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-I-NEXT: $x10 = COPY %lo1(s64)
+ ; CHECK-I-NEXT: $x11 = COPY %hi1(s64)
+ ; CHECK-I-NEXT: $x12 = COPY %lo2(s64)
+ ; CHECK-I-NEXT: $x13 = COPY %hi2(s64)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__divti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -242,30 +242,30 @@ body: |
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
;
; CHECK-M-LABEL: name: sdiv_i128
- ; CHECK-M: %hi1:_(s64) = COPY $x10
- ; CHECK-M-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-M-NEXT: %hi2:_(s64) = COPY $x12
- ; CHECK-M-NEXT: %lo2:_(s64) = COPY $x13
- ; CHECK-M-NEXT: $x10 = COPY %hi1(s64)
- ; CHECK-M-NEXT: $x11 = COPY %lo1(s64)
- ; CHECK-M-NEXT: $x12 = COPY %hi2(s64)
- ; CHECK-M-NEXT: $x13 = COPY %lo2(s64)
+ ; CHECK-M: %lo1:_(s64) = COPY $x10
+ ; CHECK-M-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-M-NEXT: %lo2:_(s64) = COPY $x12
+ ; CHECK-M-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-M-NEXT: $x10 = COPY %lo1(s64)
+ ; CHECK-M-NEXT: $x11 = COPY %hi1(s64)
+ ; CHECK-M-NEXT: $x12 = COPY %lo2(s64)
+ ; CHECK-M-NEXT: $x13 = COPY %hi2(s64)
; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__divti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s64) = COPY $x10
- %lo1:_(s64) = COPY $x11
- %hi2:_(s64) = COPY $x12
- %lo2:_(s64) = COPY $x13
- %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
- %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %lo1:_(s64) = COPY $x10
+ %hi1:_(s64) = COPY $x11
+ %lo2:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %lo1(s64), %hi1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %lo2(s64), %hi2(s64)
%y:_(s128) = G_SDIV %x1, %x2
- %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
- $x10 = COPY %hiy(s64)
- $x11 = COPY %loy(s64)
+ %loy:_(s64), %hiy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %loy(s64)
+ $x11 = COPY %hiy(s64)
PseudoRET implicit $x10, implicit $x11
...
@@ -453,18 +453,18 @@ name: udiv_i72
body: |
bb.0.entry:
; CHECK-I-LABEL: name: udiv_i72
- ; CHECK-I: %xhi:_(s64) = COPY $x10
- ; CHECK-I-NEXT: %xlo:_(s64) = COPY $x11
- ; CHECK-I-NEXT: %yhi:_(s64) = COPY $x12
- ; CHECK-I-NEXT: %ylo:_(s64) = COPY $x13
+ ; CHECK-I: %xlo:_(s64) = COPY $x10
+ ; CHECK-I-NEXT: %xhi:_(s64) = COPY $x11
+ ; CHECK-I-NEXT: %ylo:_(s64) = COPY $x12
+ ; CHECK-I-NEXT: %yhi:_(s64) = COPY $x13
; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
- ; CHECK-I-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %xhi, [[C]]
- ; CHECK-I-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND %xlo, [[C1]]
+ ; CHECK-I-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %xlo, [[C]]
+ ; CHECK-I-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND %xhi, [[C1]]
; CHECK-I-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
; CHECK-I-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
- ; CHECK-I-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND %yhi, [[C2]]
- ; CHECK-I-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND %ylo, [[C3]]
+ ; CHECK-I-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND %ylo, [[C2]]
+ ; CHECK-I-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND %yhi, [[C3]]
; CHECK-I-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s64)
; CHECK-I-NEXT: $x12 = COPY [[AND2]](s64)
@@ -477,18 +477,18 @@ body: |
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
;
; CHECK-M-LABEL: name: udiv_i72
- ; CHECK-M: %xhi:_(s64) = COPY $x10
- ; CHECK-M-NEXT: %xlo:_(s64) = COPY $x11
- ; CHECK-M-NEXT: %yhi:_(s64) = COPY $x12
- ; CHECK-M-NEXT: %ylo:_(s64) = COPY $x13
+ ; CHECK-M: %xlo:_(s64) = COPY $x10
+ ; CHECK-M-NEXT: %xhi:_(s64) = COPY $x11
+ ; CHECK-M-NEXT: %ylo:_(s64) = COPY $x12
+ ; CHECK-M-NEXT: %yhi:_(s64) = COPY $x13
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
- ; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %xhi, [[C]]
- ; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND %xlo, [[C1]]
+ ; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %xlo, [[C]]
+ ; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND %xhi, [[C1]]
; CHECK-M-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
; CHECK-M-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
- ; CHECK-M-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND %yhi, [[C2]]
- ; CHECK-M-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND %ylo, [[C3]]
+ ; CHECK-M-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND %ylo, [[C2]]
+ ; CHECK-M-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND %yhi, [[C3]]
; CHECK-M-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-M-NEXT: $x11 = COPY [[AND1]](s64)
; CHECK-M-NEXT: $x12 = COPY [[AND2]](s64)
@@ -499,19 +499,19 @@ body: |
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s64) = COPY $x10
- %xlo:_(s64) = COPY $x11
- %yhi:_(s64) = COPY $x12
- %ylo:_(s64) = COPY $x13
- %x0:_(s128) = G_MERGE_VALUES %xhi(s64), %xlo(s64)
- %y0:_(s128) = G_MERGE_VALUES %yhi(s64), %ylo(s64)
+ %xlo:_(s64) = COPY $x10
+ %xhi:_(s64) = COPY $x11
+ %ylo:_(s64) = COPY $x12
+ %yhi:_(s64) = COPY $x13
+ %x0:_(s128) = G_MERGE_VALUES %xlo(s64), %xhi(s64)
+ %y0:_(s128) = G_MERGE_VALUES %ylo(s64), %yhi(s64)
%x:_(s72) = G_TRUNC %x0
%y:_(s72) = G_TRUNC %y0
%z:_(s72) = G_UDIV %x, %y
%z0:_(s128) = G_ANYEXT %z
- %zhi:_(s64), %zlo:_(s64) = G_UNMERGE_VALUES %z0(s128)
- $x10 = COPY %zhi(s64)
- $x11 = COPY %zlo(s64)
+ %zlo:_(s64), %zhi:_(s64) = G_UNMERGE_VALUES %z0(s128)
+ $x10 = COPY %zlo(s64)
+ $x11 = COPY %zhi(s64)
PseudoRET implicit $x10, implicit $x11
...
@@ -520,14 +520,14 @@ name: udiv_i128
body: |
bb.0.entry:
; CHECK-I-LABEL: name: udiv_i128
- ; CHECK-I: %hi1:_(s64) = COPY $x10
- ; CHECK-I-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-I-NEXT: %hi2:_(s64) = COPY $x12
- ; CHECK-I-NEXT: %lo2:_(s64) = COPY $x13
- ; CHECK-I-NEXT: $x10 = COPY %hi1(s64)
- ; CHECK-I-NEXT: $x11 = COPY %lo1(s64)
- ; CHECK-I-NEXT: $x12 = COPY %hi2(s64)
- ; CHECK-I-NEXT: $x13 = COPY %lo2(s64)
+ ; CHECK-I: %lo1:_(s64) = COPY $x10
+ ; CHECK-I-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-I-NEXT: %lo2:_(s64) = COPY $x12
+ ; CHECK-I-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-I-NEXT: $x10 = COPY %lo1(s64)
+ ; CHECK-I-NEXT: $x11 = COPY %hi1(s64)
+ ; CHECK-I-NEXT: $x12 = COPY %lo2(s64)
+ ; CHECK-I-NEXT: $x13 = COPY %hi2(s64)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__udivti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -536,30 +536,30 @@ body: |
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
;
; CHECK-M-LABEL: name: udiv_i128
- ; CHECK-M: %hi1:_(s64) = COPY $x10
- ; CHECK-M-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-M-NEXT: %hi2:_(s64) = COPY $x12
- ; CHECK-M-NEXT: %lo2:_(s64) = COPY $x13
- ; CHECK-M-NEXT: $x10 = COPY %hi1(s64)
- ; CHECK-M-NEXT: $x11 = COPY %lo1(s64)
- ; CHECK-M-NEXT: $x12 = COPY %hi2(s64)
- ; CHECK-M-NEXT: $x13 = COPY %lo2(s64)
+ ; CHECK-M: %lo1:_(s64) = COPY $x10
+ ; CHECK-M-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-M-NEXT: %lo2:_(s64) = COPY $x12
+ ; CHECK-M-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-M-NEXT: $x10 = COPY %lo1(s64)
+ ; CHECK-M-NEXT: $x11 = COPY %hi1(s64)
+ ; CHECK-M-NEXT: $x12 = COPY %lo2(s64)
+ ; CHECK-M-NEXT: $x13 = COPY %hi2(s64)
; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__udivti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s64) = COPY $x10
- %lo1:_(s64) = COPY $x11
- %hi2:_(s64) = COPY $x12
- %lo2:_(s64) = COPY $x13
- %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
- %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %lo1:_(s64) = COPY $x10
+ %hi1:_(s64) = COPY $x11
+ %lo2:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %lo1(s64), %hi1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %lo2(s64), %hi2(s64)
%y:_(s128) = G_UDIV %x1, %x2
- %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
- $x10 = COPY %hiy(s64)
- $x11 = COPY %loy(s64)
+ %loy:_(s64), %hiy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %loy(s64)
+ $x11 = COPY %hiy(s64)
PseudoRET implicit $x10, implicit $x11
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-lshr.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-lshr.mir
index a6dcc7602253f6..22c36e1bbadc2c 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-lshr.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-lshr.mir
@@ -171,43 +171,43 @@ name: lshr_i128
body: |
bb.0.entry:
; CHECK-LABEL: name: lshr_i128
- ; CHECK: %hi1:_(s64) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x12
+ ; CHECK: %lo1:_(s64) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
- ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB %hi2, [[C]]
- ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C]], %hi2
+ ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB %lo2, [[C]]
+ ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C]], %lo2
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %hi2(s64), [[C]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %hi2(s64), [[C1]]
- ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR %lo1, %hi2(s64)
- ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR %hi1, %hi2(s64)
- ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %lo1, [[SUB1]](s64)
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %lo2(s64), [[C]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %lo2(s64), [[C1]]
+ ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR %hi1, %lo2(s64)
+ ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR %lo1, %lo2(s64)
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %hi1, [[SUB1]](s64)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR %lo1, [[SUB]](s64)
+ ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR %hi1, [[SUB]](s64)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ICMP]], [[C3]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s64), [[OR]], [[LSHR2]]
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C4]]
- ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[AND1]](s64), %hi1, [[SELECT]]
+ ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[AND1]](s64), %lo1, [[SELECT]]
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[ICMP]], [[C5]]
; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[AND2]](s64), [[LSHR]], [[C2]]
; CHECK-NEXT: $x10 = COPY [[SELECT1]](s64)
; CHECK-NEXT: $x11 = COPY [[SELECT2]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s64) = COPY $x10
- %lo1:_(s64) = COPY $x11
- %hi2:_(s64) = COPY $x12
- %lo2:_(s64) = COPY $x13
- %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
- %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %lo1:_(s64) = COPY $x10
+ %hi1:_(s64) = COPY $x11
+ %lo2:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %lo1(s64), %hi1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %lo2(s64), %hi2(s64)
%y:_(s128) = G_LSHR %x1, %x2
- %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
- $x10 = COPY %hiy(s64)
- $x11 = COPY %loy(s64)
+ %loy:_(s64), %hiy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %loy(s64)
+ $x11 = COPY %hiy(s64)
PseudoRET implicit $x10, implicit $x11
...
@@ -216,24 +216,24 @@ name: lshr_i192
body: |
bb.0.entry:
; CHECK-LABEL: name: lshr_i192
- ; CHECK: %hi1:_(s64) = COPY $x10
+ ; CHECK: %lo1:_(s64) = COPY $x10
; CHECK-NEXT: %mid1:_(s64) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 128
- ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB %hi2, [[C1]]
- ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C1]], %hi2
+ ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB %lo2, [[C1]]
+ ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C1]], %lo2
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %hi2(s64), [[C1]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %hi2(s64), [[C2]]
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %lo2(s64), [[C1]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %lo2(s64), [[C2]]
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
- ; CHECK-NEXT: [[SUB2:%[0-9]+]]:_(s64) = G_SUB %hi2, [[C3]]
- ; CHECK-NEXT: [[SUB3:%[0-9]+]]:_(s64) = G_SUB [[C3]], %hi2
+ ; CHECK-NEXT: [[SUB2:%[0-9]+]]:_(s64) = G_SUB %lo2, [[C3]]
+ ; CHECK-NEXT: [[SUB3:%[0-9]+]]:_(s64) = G_SUB [[C3]], %lo2
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %hi2(s64), [[C3]]
- ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %hi2(s64), [[C4]]
- ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR %lo1, %hi2(s64)
+ ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %lo2(s64), [[C3]]
+ ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %lo2(s64), [[C4]]
+ ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR %hi1, %lo2(s64)
; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[C]], [[SUB3]](s64)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL]]
; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR [[C]], [[SUB2]](s64)
@@ -242,15 +242,15 @@ body: |
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s64), [[OR]], [[LSHR1]]
; CHECK-NEXT: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[ICMP3]], [[C6]]
- ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[AND1]](s64), %lo1, [[SELECT]]
+ ; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[AND1]](s64), %hi1, [[SELECT]]
; CHECK-NEXT: [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
- ; CHECK-NEXT: [[SUB4:%[0-9]+]]:_(s64) = G_SUB %hi2, [[C7]]
- ; CHECK-NEXT: [[SUB5:%[0-9]+]]:_(s64) = G_SUB [[C7]], %hi2
+ ; CHECK-NEXT: [[SUB4:%[0-9]+]]:_(s64) = G_SUB %lo2, [[C7]]
+ ; CHECK-NEXT: [[SUB5:%[0-9]+]]:_(s64) = G_SUB [[C7]], %lo2
; CHECK-NEXT: [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %hi2(s64), [[C7]]
- ; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %hi2(s64), [[C8]]
- ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR %mid1, %hi2(s64)
- ; CHECK-NEXT: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR %hi1, %hi2(s64)
+ ; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %lo2(s64), [[C7]]
+ ; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %lo2(s64), [[C8]]
+ ; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR %mid1, %lo2(s64)
+ ; CHECK-NEXT: [[LSHR3:%[0-9]+]]:_(s64) = G_LSHR %lo1, %lo2(s64)
; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL %mid1, [[SUB5]](s64)
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[LSHR3]], [[SHL1]]
; CHECK-NEXT: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
@@ -260,7 +260,7 @@ body: |
; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[AND2]](s64), [[OR1]], [[LSHR4]]
; CHECK-NEXT: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[ICMP5]], [[C11]]
- ; CHECK-NEXT: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[AND3]](s64), %hi1, [[SELECT2]]
+ ; CHECK-NEXT: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[AND3]](s64), %lo1, [[SELECT2]]
; CHECK-NEXT: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s64) = G_AND [[ICMP4]], [[C12]]
; CHECK-NEXT: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[AND4]](s64), [[LSHR2]], [[C9]]
@@ -270,12 +270,12 @@ body: |
; CHECK-NEXT: [[C14:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: [[ICMP6:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), [[SUB1]](s64), [[C13]]
; CHECK-NEXT: [[ICMP7:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[SUB1]](s64), [[C14]]
- ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s64) = G_SHL %lo1, [[SUB1]](s64)
- ; CHECK-NEXT: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR %lo1, [[SUB7]](s64)
+ ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s64) = G_SHL %hi1, [[SUB1]](s64)
+ ; CHECK-NEXT: [[LSHR5:%[0-9]+]]:_(s64) = G_LSHR %hi1, [[SUB7]](s64)
; CHECK-NEXT: [[SHL3:%[0-9]+]]:_(s64) = G_SHL [[C]], [[SUB1]](s64)
; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s64) = G_OR [[LSHR5]], [[SHL3]]
; CHECK-NEXT: [[C15:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s64) = G_SHL %lo1, [[SUB6]](s64)
+ ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s64) = G_SHL %hi1, [[SUB6]](s64)
; CHECK-NEXT: [[C16:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s64) = G_AND [[ICMP6]], [[C16]]
; CHECK-NEXT: [[SELECT5:%[0-9]+]]:_(s64) = G_SELECT [[AND5]](s64), [[SHL2]], [[C15]]
@@ -295,7 +295,7 @@ body: |
; CHECK-NEXT: [[ICMP8:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), [[SUB]](s64), [[C20]]
; CHECK-NEXT: [[ICMP9:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[SUB]](s64), [[C21]]
; CHECK-NEXT: [[LSHR6:%[0-9]+]]:_(s64) = G_LSHR [[C]], [[SUB]](s64)
- ; CHECK-NEXT: [[LSHR7:%[0-9]+]]:_(s64) = G_LSHR %lo1, [[SUB]](s64)
+ ; CHECK-NEXT: [[LSHR7:%[0-9]+]]:_(s64) = G_LSHR %hi1, [[SUB]](s64)
; CHECK-NEXT: [[SHL5:%[0-9]+]]:_(s64) = G_SHL [[C]], [[SUB9]](s64)
; CHECK-NEXT: [[OR5:%[0-9]+]]:_(s64) = G_OR [[LSHR7]], [[SHL5]]
; CHECK-NEXT: [[C22:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
@@ -305,7 +305,7 @@ body: |
; CHECK-NEXT: [[SELECT8:%[0-9]+]]:_(s64) = G_SELECT [[AND8]](s64), [[OR5]], [[LSHR8]]
; CHECK-NEXT: [[C24:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND9:%[0-9]+]]:_(s64) = G_AND [[ICMP9]], [[C24]]
- ; CHECK-NEXT: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[AND9]](s64), %lo1, [[SELECT8]]
+ ; CHECK-NEXT: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[AND9]](s64), %hi1, [[SELECT8]]
; CHECK-NEXT: [[C25:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND10:%[0-9]+]]:_(s64) = G_AND [[ICMP8]], [[C25]]
; CHECK-NEXT: [[SELECT10:%[0-9]+]]:_(s64) = G_SELECT [[AND10]](s64), [[LSHR6]], [[C22]]
@@ -317,7 +317,7 @@ body: |
; CHECK-NEXT: [[SELECT12:%[0-9]+]]:_(s64) = G_SELECT [[AND12]](s64), [[OR4]], [[SELECT10]]
; CHECK-NEXT: [[C28:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND13:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C28]]
- ; CHECK-NEXT: [[SELECT13:%[0-9]+]]:_(s64) = G_SELECT [[AND13]](s64), %hi1, [[SELECT11]]
+ ; CHECK-NEXT: [[SELECT13:%[0-9]+]]:_(s64) = G_SELECT [[AND13]](s64), %lo1, [[SELECT11]]
; CHECK-NEXT: [[C29:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND14:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C29]]
; CHECK-NEXT: [[SELECT14:%[0-9]+]]:_(s64) = G_SELECT [[AND14]](s64), %mid1, [[SELECT12]]
@@ -328,19 +328,19 @@ body: |
; CHECK-NEXT: $x11 = COPY [[SELECT14]](s64)
; CHECK-NEXT: $x12 = COPY [[SELECT15]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s64) = COPY $x10
+ %lo1:_(s64) = COPY $x10
%mid1:_(s64) = COPY $x11
- %lo1:_(s64) = COPY $x12
- %hi2:_(s64) = COPY $x13
+ %hi1:_(s64) = COPY $x12
+ %lo2:_(s64) = COPY $x13
%mid2:_(s64) = COPY $x14
- %lo2:_(s64) = COPY $x15
- %x1:_(s192) = G_MERGE_VALUES %hi1(s64), %mid1(s64), %lo1(s64)
- %x2:_(s192) = G_MERGE_VALUES %hi2(s64), %mid2(s64), %lo2(s64)
+ %hi2:_(s64) = COPY $x15
+ %x1:_(s192) = G_MERGE_VALUES %lo1(s64), %mid1(s64), %hi1(s64)
+ %x2:_(s192) = G_MERGE_VALUES %lo2(s64), %mid2(s64), %hi2(s64)
%y:_(s192) = G_LSHR %x1, %x2
- %hi:_(s64), %mid:_(s64), %lo:_(s64) = G_UNMERGE_VALUES %y(s192)
- $x10 = COPY %hi(s64)
+ %lo:_(s64), %mid:_(s64), %hi:_(s64) = G_UNMERGE_VALUES %y(s192)
+ $x10 = COPY %lo(s64)
$x11 = COPY %mid(s64)
- $x12 = COPY %lo(s64)
+ $x12 = COPY %hi(s64)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-mul-ext.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-mul-ext.mir
index 876d2bfcfeb1cb..c6945127148d78 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-mul-ext.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-mul-ext.mir
@@ -105,32 +105,32 @@ name: mul_i72
body: |
bb.0.entry:
; CHECK-LABEL: name: mul_i72
- ; CHECK: %xhi:_(s64) = COPY $x10
- ; CHECK-NEXT: %xlo:_(s64) = COPY $x11
- ; CHECK-NEXT: %yhi:_(s64) = COPY $x12
- ; CHECK-NEXT: %ylo:_(s64) = COPY $x13
- ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s64) = G_MUL %xhi, %yhi
- ; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(s64) = G_MUL %xlo, %yhi
- ; CHECK-NEXT: [[MUL2:%[0-9]+]]:_(s64) = G_MUL %xhi, %ylo
- ; CHECK-NEXT: [[UMULH:%[0-9]+]]:_(s64) = G_UMULH %xhi, %yhi
+ ; CHECK: %xlo:_(s64) = COPY $x10
+ ; CHECK-NEXT: %xhi:_(s64) = COPY $x11
+ ; CHECK-NEXT: %ylo:_(s64) = COPY $x12
+ ; CHECK-NEXT: %yhi:_(s64) = COPY $x13
+ ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s64) = G_MUL %xlo, %ylo
+ ; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(s64) = G_MUL %xhi, %ylo
+ ; CHECK-NEXT: [[MUL2:%[0-9]+]]:_(s64) = G_MUL %xlo, %yhi
+ ; CHECK-NEXT: [[UMULH:%[0-9]+]]:_(s64) = G_UMULH %xlo, %ylo
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[MUL1]], [[MUL2]]
; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s64) = G_ADD [[ADD]], [[UMULH]]
; CHECK-NEXT: $x10 = COPY [[MUL]](s64)
; CHECK-NEXT: $x11 = COPY [[ADD1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s64) = COPY $x10
- %xlo:_(s64) = COPY $x11
- %yhi:_(s64) = COPY $x12
- %ylo:_(s64) = COPY $x13
- %x0:_(s128) = G_MERGE_VALUES %xhi(s64), %xlo(s64)
- %y0:_(s128) = G_MERGE_VALUES %yhi(s64), %ylo(s64)
+ %xlo:_(s64) = COPY $x10
+ %xhi:_(s64) = COPY $x11
+ %ylo:_(s64) = COPY $x12
+ %yhi:_(s64) = COPY $x13
+ %x0:_(s128) = G_MERGE_VALUES %xlo(s64), %xhi(s64)
+ %y0:_(s128) = G_MERGE_VALUES %ylo(s64), %yhi(s64)
%x:_(s72) = G_TRUNC %x0(s128)
%y:_(s72) = G_TRUNC %y0(s128)
%z:_(s72) = G_MUL %x, %y
%z0:_(s128) = G_ANYEXT %z(s72)
- %zhi:_(s64), %zlo:_(s64) = G_UNMERGE_VALUES %z0(s128)
- $x10 = COPY %zhi(s64)
- $x11 = COPY %zlo(s64)
+ %zlo:_(s64), %zhi:_(s64) = G_UNMERGE_VALUES %z0(s128)
+ $x10 = COPY %zlo(s64)
+ $x11 = COPY %zhi(s64)
PseudoRET implicit $x10, implicit $x11
...
@@ -139,29 +139,29 @@ name: mul_i128
body: |
bb.0.entry:
; CHECK-LABEL: name: mul_i128
- ; CHECK: %hi1:_(s64) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x12
- ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
- ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s64) = G_MUL %hi1, %hi2
- ; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(s64) = G_MUL %lo1, %hi2
- ; CHECK-NEXT: [[MUL2:%[0-9]+]]:_(s64) = G_MUL %hi1, %lo2
- ; CHECK-NEXT: [[UMULH:%[0-9]+]]:_(s64) = G_UMULH %hi1, %hi2
+ ; CHECK: %lo1:_(s64) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s64) = G_MUL %lo1, %lo2
+ ; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(s64) = G_MUL %hi1, %lo2
+ ; CHECK-NEXT: [[MUL2:%[0-9]+]]:_(s64) = G_MUL %lo1, %hi2
+ ; CHECK-NEXT: [[UMULH:%[0-9]+]]:_(s64) = G_UMULH %lo1, %lo2
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[MUL1]], [[MUL2]]
; CHECK-NEXT: [[ADD1:%[0-9]+]]:_(s64) = G_ADD [[ADD]], [[UMULH]]
; CHECK-NEXT: $x10 = COPY [[MUL]](s64)
; CHECK-NEXT: $x11 = COPY [[ADD1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s64) = COPY $x10
- %lo1:_(s64) = COPY $x11
- %hi2:_(s64) = COPY $x12
- %lo2:_(s64) = COPY $x13
- %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
- %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %lo1:_(s64) = COPY $x10
+ %hi1:_(s64) = COPY $x11
+ %lo2:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %lo1(s64), %hi1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %lo2(s64), %hi2(s64)
%y:_(s128) = G_MUL %x1, %x2
- %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
- $x10 = COPY %hiy(s64)
- $x11 = COPY %loy(s64)
+ %loy:_(s64), %hiy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %loy(s64)
+ $x11 = COPY %hiy(s64)
PseudoRET implicit $x10, implicit $x11
...
@@ -170,16 +170,16 @@ name: mul_i192
body: |
bb.0.entry:
; CHECK-LABEL: name: mul_i192
- ; CHECK: %hi1:_(s64) = COPY $x10
+ ; CHECK: %lo1:_(s64) = COPY $x10
; CHECK-NEXT: %mid1:_(s64) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
; CHECK-NEXT: %mid2:_(s64) = COPY $x14
- ; CHECK-NEXT: %lo2:_(s64) = COPY $x15
- ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s64) = G_MUL %hi1, %hi2
- ; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(s64) = G_MUL %mid1, %hi2
- ; CHECK-NEXT: [[MUL2:%[0-9]+]]:_(s64) = G_MUL %hi1, %mid2
- ; CHECK-NEXT: [[UMULH:%[0-9]+]]:_(s64) = G_UMULH %hi1, %hi2
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x15
+ ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s64) = G_MUL %lo1, %lo2
+ ; CHECK-NEXT: [[MUL1:%[0-9]+]]:_(s64) = G_MUL %mid1, %lo2
+ ; CHECK-NEXT: [[MUL2:%[0-9]+]]:_(s64) = G_MUL %lo1, %mid2
+ ; CHECK-NEXT: [[UMULH:%[0-9]+]]:_(s64) = G_UMULH %lo1, %lo2
; CHECK-NEXT: [[UADDO:%[0-9]+]]:_(s64), [[UADDO1:%[0-9]+]]:_(s64) = G_UADDO [[MUL1]], [[MUL2]]
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[UADDO1]], [[C]]
@@ -187,11 +187,11 @@ body: |
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[UADDO3]], [[C1]]
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[AND]], [[AND1]]
- ; CHECK-NEXT: [[MUL3:%[0-9]+]]:_(s64) = G_MUL %lo1, %hi2
+ ; CHECK-NEXT: [[MUL3:%[0-9]+]]:_(s64) = G_MUL %hi1, %lo2
; CHECK-NEXT: [[MUL4:%[0-9]+]]:_(s64) = G_MUL %mid1, %mid2
- ; CHECK-NEXT: [[MUL5:%[0-9]+]]:_(s64) = G_MUL %hi1, %lo2
- ; CHECK-NEXT: [[UMULH1:%[0-9]+]]:_(s64) = G_UMULH %mid1, %hi2
- ; CHECK-NEXT: [[UMULH2:%[0-9]+]]:_(s64) = G_UMULH %hi1, %mid2
+ ; CHECK-NEXT: [[MUL5:%[0-9]+]]:_(s64) = G_MUL %lo1, %hi2
+ ; CHECK-NEXT: [[UMULH1:%[0-9]+]]:_(s64) = G_UMULH %mid1, %lo2
+ ; CHECK-NEXT: [[UMULH2:%[0-9]+]]:_(s64) = G_UMULH %lo1, %mid2
; CHECK-NEXT: [[UADDO4:%[0-9]+]]:_(s64), [[UADDO5:%[0-9]+]]:_(s64) = G_UADDO [[MUL3]], [[MUL4]]
; CHECK-NEXT: [[UADDO6:%[0-9]+]]:_(s64), [[UADDO7:%[0-9]+]]:_(s64) = G_UADDO [[UADDO4]], [[MUL5]]
; CHECK-NEXT: [[UADDO8:%[0-9]+]]:_(s64), [[UADDO9:%[0-9]+]]:_(s64) = G_UADDO [[UADDO6]], [[UMULH1]]
@@ -201,19 +201,19 @@ body: |
; CHECK-NEXT: $x11 = COPY [[UADDO2]](s64)
; CHECK-NEXT: $x12 = COPY [[UADDO12]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s64) = COPY $x10
+ %lo1:_(s64) = COPY $x10
%mid1:_(s64) = COPY $x11
- %lo1:_(s64) = COPY $x12
- %hi2:_(s64) = COPY $x13
+ %hi1:_(s64) = COPY $x12
+ %lo2:_(s64) = COPY $x13
%mid2:_(s64) = COPY $x14
- %lo2:_(s64) = COPY $x15
- %x1:_(s192) = G_MERGE_VALUES %hi1(s64), %mid1(s64), %lo1(s64)
- %x2:_(s192) = G_MERGE_VALUES %hi2(s64), %mid2(s64), %lo2(s64)
+ %hi2:_(s64) = COPY $x15
+ %x1:_(s192) = G_MERGE_VALUES %lo1(s64), %mid1(s64), %hi1(s64)
+ %x2:_(s192) = G_MERGE_VALUES %lo2(s64), %mid2(s64), %hi2(s64)
%y:_(s192) = G_MUL %x1, %x2
- %hi:_(s64), %mid:_(s64), %lo:_(s64) = G_UNMERGE_VALUES %y(s192)
- $x10 = COPY %hi(s64)
+ %lo:_(s64), %mid:_(s64), %hi:_(s64) = G_UNMERGE_VALUES %y(s192)
+ $x10 = COPY %lo(s64)
$x11 = COPY %mid(s64)
- $x12 = COPY %lo(s64)
+ $x12 = COPY %hi(s64)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-mul.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-mul.mir
index 7bc0e7da4de337..8ce80902ef55b9 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-mul.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-mul.mir
@@ -118,30 +118,30 @@ name: mul_i128
body: |
bb.0.entry:
; CHECK-LABEL: name: mul_i128
- ; CHECK: %hi1:_(s64) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x12
- ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
- ; CHECK-NEXT: $x10 = COPY %hi1(s64)
- ; CHECK-NEXT: $x11 = COPY %lo1(s64)
- ; CHECK-NEXT: $x12 = COPY %hi2(s64)
- ; CHECK-NEXT: $x13 = COPY %lo2(s64)
+ ; CHECK: %lo1:_(s64) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: $x10 = COPY %lo1(s64)
+ ; CHECK-NEXT: $x11 = COPY %hi1(s64)
+ ; CHECK-NEXT: $x12 = COPY %lo2(s64)
+ ; CHECK-NEXT: $x13 = COPY %hi2(s64)
; CHECK-NEXT: PseudoCALL target-flags(riscv-call) &__multi3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-NEXT: $x11 = COPY [[COPY1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s64) = COPY $x10
- %lo1:_(s64) = COPY $x11
- %hi2:_(s64) = COPY $x12
- %lo2:_(s64) = COPY $x13
- %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
- %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %lo1:_(s64) = COPY $x10
+ %hi1:_(s64) = COPY $x11
+ %lo2:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %lo1(s64), %hi1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %lo2(s64), %hi2(s64)
%y:_(s128) = G_MUL %x1, %x2
- %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
- $x10 = COPY %hiy(s64)
- $x11 = COPY %loy(s64)
+ %loy:_(s64), %hiy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %loy(s64)
+ $x11 = COPY %hiy(s64)
PseudoRET implicit $x10, implicit $x11
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir
index dca6174dc9899a..d5b26a42b203e8 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-or.mir
@@ -133,25 +133,25 @@ name: or_i128
body: |
bb.0.entry:
; CHECK-LABEL: name: or_i128
- ; CHECK: %hi1:_(s64) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x12
- ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR %hi1, %hi2
- ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR %lo1, %lo2
+ ; CHECK: %lo1:_(s64) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR %lo1, %lo2
+ ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR %hi1, %hi2
; CHECK-NEXT: $x10 = COPY [[OR]](s64)
; CHECK-NEXT: $x11 = COPY [[OR1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s64) = COPY $x10
- %lo1:_(s64) = COPY $x11
- %hi2:_(s64) = COPY $x12
- %lo2:_(s64) = COPY $x13
- %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
- %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %lo1:_(s64) = COPY $x10
+ %hi1:_(s64) = COPY $x11
+ %lo2:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %lo1(s64), %hi1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %lo2(s64), %hi2(s64)
%y:_(s128) = G_OR %x1, %x2
- %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
- $x10 = COPY %hiy(s64)
- $x11 = COPY %loy(s64)
+ %loy:_(s64), %hiy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %loy(s64)
+ $x11 = COPY %hiy(s64)
PseudoRET implicit $x10, implicit $x11
...
@@ -160,32 +160,32 @@ name: or_i192
body: |
bb.0.entry:
; CHECK-LABEL: name: or_i192
- ; CHECK: %hi1:_(s64) = COPY $x10
+ ; CHECK: %lo1:_(s64) = COPY $x10
; CHECK-NEXT: %mid1:_(s64) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
; CHECK-NEXT: %mid2:_(s64) = COPY $x14
- ; CHECK-NEXT: %lo2:_(s64) = COPY $x15
- ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR %hi1, %hi2
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x15
+ ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR %lo1, %lo2
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR %mid1, %mid2
- ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s64) = G_OR %lo1, %lo2
+ ; CHECK-NEXT: [[OR2:%[0-9]+]]:_(s64) = G_OR %hi1, %hi2
; CHECK-NEXT: $x10 = COPY [[OR]](s64)
; CHECK-NEXT: $x11 = COPY [[OR1]](s64)
; CHECK-NEXT: $x12 = COPY [[OR2]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s64) = COPY $x10
+ %lo1:_(s64) = COPY $x10
%mid1:_(s64) = COPY $x11
- %lo1:_(s64) = COPY $x12
- %hi2:_(s64) = COPY $x13
+ %hi1:_(s64) = COPY $x12
+ %lo2:_(s64) = COPY $x13
%mid2:_(s64) = COPY $x14
- %lo2:_(s64) = COPY $x15
- %x1:_(s192) = G_MERGE_VALUES %hi1(s64), %mid1(s64), %lo1(s64)
- %x2:_(s192) = G_MERGE_VALUES %hi2(s64), %mid2(s64), %lo2(s64)
+ %hi2:_(s64) = COPY $x15
+ %x1:_(s192) = G_MERGE_VALUES %lo1(s64), %mid1(s64), %hi1(s64)
+ %x2:_(s192) = G_MERGE_VALUES %lo2(s64), %mid2(s64), %hi2(s64)
%y:_(s192) = G_OR %x1, %x2
- %hi:_(s64), %mid:_(s64), %lo:_(s64) = G_UNMERGE_VALUES %y(s192)
- $x10 = COPY %hi(s64)
+ %lo:_(s64), %mid:_(s64), %hi:_(s64) = G_UNMERGE_VALUES %y(s192)
+ $x10 = COPY %lo(s64)
$x11 = COPY %mid(s64)
- $x12 = COPY %lo(s64)
+ $x12 = COPY %hi(s64)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-rem.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-rem.mir
index 99be1fcbe49652..74e02b9f61161e 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-rem.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-rem.mir
@@ -171,15 +171,15 @@ name: srem_i72
body: |
bb.0.entry:
; CHECK-I-LABEL: name: srem_i72
- ; CHECK-I: %xhi:_(s64) = COPY $x10
- ; CHECK-I-NEXT: %xlo:_(s64) = COPY $x11
- ; CHECK-I-NEXT: %yhi:_(s64) = COPY $x12
- ; CHECK-I-NEXT: %ylo:_(s64) = COPY $x13
- ; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %xlo, 8
- ; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %ylo, 8
- ; CHECK-I-NEXT: $x10 = COPY %xhi(s64)
+ ; CHECK-I: %xlo:_(s64) = COPY $x10
+ ; CHECK-I-NEXT: %xhi:_(s64) = COPY $x11
+ ; CHECK-I-NEXT: %ylo:_(s64) = COPY $x12
+ ; CHECK-I-NEXT: %yhi:_(s64) = COPY $x13
+ ; CHECK-I-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %xhi, 8
+ ; CHECK-I-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %yhi, 8
+ ; CHECK-I-NEXT: $x10 = COPY %xlo(s64)
; CHECK-I-NEXT: $x11 = COPY [[SEXT_INREG]](s64)
- ; CHECK-I-NEXT: $x12 = COPY %yhi(s64)
+ ; CHECK-I-NEXT: $x12 = COPY %ylo(s64)
; CHECK-I-NEXT: $x13 = COPY [[SEXT_INREG1]](s64)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
@@ -189,15 +189,15 @@ body: |
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
;
; CHECK-M-LABEL: name: srem_i72
- ; CHECK-M: %xhi:_(s64) = COPY $x10
- ; CHECK-M-NEXT: %xlo:_(s64) = COPY $x11
- ; CHECK-M-NEXT: %yhi:_(s64) = COPY $x12
- ; CHECK-M-NEXT: %ylo:_(s64) = COPY $x13
- ; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %xlo, 8
- ; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %ylo, 8
- ; CHECK-M-NEXT: $x10 = COPY %xhi(s64)
+ ; CHECK-M: %xlo:_(s64) = COPY $x10
+ ; CHECK-M-NEXT: %xhi:_(s64) = COPY $x11
+ ; CHECK-M-NEXT: %ylo:_(s64) = COPY $x12
+ ; CHECK-M-NEXT: %yhi:_(s64) = COPY $x13
+ ; CHECK-M-NEXT: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG %xhi, 8
+ ; CHECK-M-NEXT: [[SEXT_INREG1:%[0-9]+]]:_(s64) = G_SEXT_INREG %yhi, 8
+ ; CHECK-M-NEXT: $x10 = COPY %xlo(s64)
; CHECK-M-NEXT: $x11 = COPY [[SEXT_INREG]](s64)
- ; CHECK-M-NEXT: $x12 = COPY %yhi(s64)
+ ; CHECK-M-NEXT: $x12 = COPY %ylo(s64)
; CHECK-M-NEXT: $x13 = COPY [[SEXT_INREG1]](s64)
; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__modti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
@@ -205,19 +205,19 @@ body: |
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s64) = COPY $x10
- %xlo:_(s64) = COPY $x11
- %yhi:_(s64) = COPY $x12
- %ylo:_(s64) = COPY $x13
- %x0:_(s128) = G_MERGE_VALUES %xhi(s64), %xlo(s64)
- %y0:_(s128) = G_MERGE_VALUES %yhi(s64), %ylo(s64)
+ %xlo:_(s64) = COPY $x10
+ %xhi:_(s64) = COPY $x11
+ %ylo:_(s64) = COPY $x12
+ %yhi:_(s64) = COPY $x13
+ %x0:_(s128) = G_MERGE_VALUES %xlo(s64), %xhi(s64)
+ %y0:_(s128) = G_MERGE_VALUES %ylo(s64), %yhi(s64)
%x:_(s72) = G_TRUNC %x0
%y:_(s72) = G_TRUNC %y0
%z:_(s72) = G_SREM %x, %y
%z0:_(s128) = G_ANYEXT %z
- %zhi:_(s64), %zlo:_(s64) = G_UNMERGE_VALUES %z0(s128)
- $x10 = COPY %zhi(s64)
- $x11 = COPY %zlo(s64)
+ %zlo:_(s64), %zhi:_(s64) = G_UNMERGE_VALUES %z0(s128)
+ $x10 = COPY %zlo(s64)
+ $x11 = COPY %zhi(s64)
PseudoRET implicit $x10, implicit $x11
...
@@ -226,14 +226,14 @@ name: srem_i128
body: |
bb.0.entry:
; CHECK-I-LABEL: name: srem_i128
- ; CHECK-I: %hi1:_(s64) = COPY $x10
- ; CHECK-I-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-I-NEXT: %hi2:_(s64) = COPY $x12
- ; CHECK-I-NEXT: %lo2:_(s64) = COPY $x13
- ; CHECK-I-NEXT: $x10 = COPY %hi1(s64)
- ; CHECK-I-NEXT: $x11 = COPY %lo1(s64)
- ; CHECK-I-NEXT: $x12 = COPY %hi2(s64)
- ; CHECK-I-NEXT: $x13 = COPY %lo2(s64)
+ ; CHECK-I: %lo1:_(s64) = COPY $x10
+ ; CHECK-I-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-I-NEXT: %lo2:_(s64) = COPY $x12
+ ; CHECK-I-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-I-NEXT: $x10 = COPY %lo1(s64)
+ ; CHECK-I-NEXT: $x11 = COPY %hi1(s64)
+ ; CHECK-I-NEXT: $x12 = COPY %lo2(s64)
+ ; CHECK-I-NEXT: $x13 = COPY %hi2(s64)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__modti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -242,30 +242,30 @@ body: |
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
;
; CHECK-M-LABEL: name: srem_i128
- ; CHECK-M: %hi1:_(s64) = COPY $x10
- ; CHECK-M-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-M-NEXT: %hi2:_(s64) = COPY $x12
- ; CHECK-M-NEXT: %lo2:_(s64) = COPY $x13
- ; CHECK-M-NEXT: $x10 = COPY %hi1(s64)
- ; CHECK-M-NEXT: $x11 = COPY %lo1(s64)
- ; CHECK-M-NEXT: $x12 = COPY %hi2(s64)
- ; CHECK-M-NEXT: $x13 = COPY %lo2(s64)
+ ; CHECK-M: %lo1:_(s64) = COPY $x10
+ ; CHECK-M-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-M-NEXT: %lo2:_(s64) = COPY $x12
+ ; CHECK-M-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-M-NEXT: $x10 = COPY %lo1(s64)
+ ; CHECK-M-NEXT: $x11 = COPY %hi1(s64)
+ ; CHECK-M-NEXT: $x12 = COPY %lo2(s64)
+ ; CHECK-M-NEXT: $x13 = COPY %hi2(s64)
; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__modti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s64) = COPY $x10
- %lo1:_(s64) = COPY $x11
- %hi2:_(s64) = COPY $x12
- %lo2:_(s64) = COPY $x13
- %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
- %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %lo1:_(s64) = COPY $x10
+ %hi1:_(s64) = COPY $x11
+ %lo2:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %lo1(s64), %hi1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %lo2(s64), %hi2(s64)
%y:_(s128) = G_SREM %x1, %x2
- %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
- $x10 = COPY %hiy(s64)
- $x11 = COPY %loy(s64)
+ %loy:_(s64), %hiy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %loy(s64)
+ $x11 = COPY %hiy(s64)
PseudoRET implicit $x10, implicit $x11
...
@@ -453,18 +453,18 @@ name: urem_i72
body: |
bb.0.entry:
; CHECK-I-LABEL: name: urem_i72
- ; CHECK-I: %xhi:_(s64) = COPY $x10
- ; CHECK-I-NEXT: %xlo:_(s64) = COPY $x11
- ; CHECK-I-NEXT: %yhi:_(s64) = COPY $x12
- ; CHECK-I-NEXT: %ylo:_(s64) = COPY $x13
+ ; CHECK-I: %xlo:_(s64) = COPY $x10
+ ; CHECK-I-NEXT: %xhi:_(s64) = COPY $x11
+ ; CHECK-I-NEXT: %ylo:_(s64) = COPY $x12
+ ; CHECK-I-NEXT: %yhi:_(s64) = COPY $x13
; CHECK-I-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
; CHECK-I-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
- ; CHECK-I-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %xhi, [[C]]
- ; CHECK-I-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND %xlo, [[C1]]
+ ; CHECK-I-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %xlo, [[C]]
+ ; CHECK-I-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND %xhi, [[C1]]
; CHECK-I-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
; CHECK-I-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
- ; CHECK-I-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND %yhi, [[C2]]
- ; CHECK-I-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND %ylo, [[C3]]
+ ; CHECK-I-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND %ylo, [[C2]]
+ ; CHECK-I-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND %yhi, [[C3]]
; CHECK-I-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-I-NEXT: $x11 = COPY [[AND1]](s64)
; CHECK-I-NEXT: $x12 = COPY [[AND2]](s64)
@@ -477,18 +477,18 @@ body: |
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
;
; CHECK-M-LABEL: name: urem_i72
- ; CHECK-M: %xhi:_(s64) = COPY $x10
- ; CHECK-M-NEXT: %xlo:_(s64) = COPY $x11
- ; CHECK-M-NEXT: %yhi:_(s64) = COPY $x12
- ; CHECK-M-NEXT: %ylo:_(s64) = COPY $x13
+ ; CHECK-M: %xlo:_(s64) = COPY $x10
+ ; CHECK-M-NEXT: %xhi:_(s64) = COPY $x11
+ ; CHECK-M-NEXT: %ylo:_(s64) = COPY $x12
+ ; CHECK-M-NEXT: %yhi:_(s64) = COPY $x13
; CHECK-M-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
; CHECK-M-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
- ; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %xhi, [[C]]
- ; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND %xlo, [[C1]]
+ ; CHECK-M-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND %xlo, [[C]]
+ ; CHECK-M-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND %xhi, [[C1]]
; CHECK-M-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
; CHECK-M-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
- ; CHECK-M-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND %yhi, [[C2]]
- ; CHECK-M-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND %ylo, [[C3]]
+ ; CHECK-M-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND %ylo, [[C2]]
+ ; CHECK-M-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND %yhi, [[C3]]
; CHECK-M-NEXT: $x10 = COPY [[AND]](s64)
; CHECK-M-NEXT: $x11 = COPY [[AND1]](s64)
; CHECK-M-NEXT: $x12 = COPY [[AND2]](s64)
@@ -499,19 +499,19 @@ body: |
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
- %xhi:_(s64) = COPY $x10
- %xlo:_(s64) = COPY $x11
- %yhi:_(s64) = COPY $x12
- %ylo:_(s64) = COPY $x13
- %x0:_(s128) = G_MERGE_VALUES %xhi(s64), %xlo(s64)
- %y0:_(s128) = G_MERGE_VALUES %yhi(s64), %ylo(s64)
+ %xlo:_(s64) = COPY $x10
+ %xhi:_(s64) = COPY $x11
+ %ylo:_(s64) = COPY $x12
+ %yhi:_(s64) = COPY $x13
+ %x0:_(s128) = G_MERGE_VALUES %xlo(s64), %xhi(s64)
+ %y0:_(s128) = G_MERGE_VALUES %ylo(s64), %yhi(s64)
%x:_(s72) = G_TRUNC %x0
%y:_(s72) = G_TRUNC %y0
%z:_(s72) = G_UREM %x, %y
%z0:_(s128) = G_ANYEXT %z
- %zhi:_(s64), %zlo:_(s64) = G_UNMERGE_VALUES %z0(s128)
- $x10 = COPY %zhi(s64)
- $x11 = COPY %zlo(s64)
+ %zlo:_(s64), %zhi:_(s64) = G_UNMERGE_VALUES %z0(s128)
+ $x10 = COPY %zlo(s64)
+ $x11 = COPY %zhi(s64)
PseudoRET implicit $x10, implicit $x11
...
@@ -520,14 +520,14 @@ name: urem_i128
body: |
bb.0.entry:
; CHECK-I-LABEL: name: urem_i128
- ; CHECK-I: %hi1:_(s64) = COPY $x10
- ; CHECK-I-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-I-NEXT: %hi2:_(s64) = COPY $x12
- ; CHECK-I-NEXT: %lo2:_(s64) = COPY $x13
- ; CHECK-I-NEXT: $x10 = COPY %hi1(s64)
- ; CHECK-I-NEXT: $x11 = COPY %lo1(s64)
- ; CHECK-I-NEXT: $x12 = COPY %hi2(s64)
- ; CHECK-I-NEXT: $x13 = COPY %lo2(s64)
+ ; CHECK-I: %lo1:_(s64) = COPY $x10
+ ; CHECK-I-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-I-NEXT: %lo2:_(s64) = COPY $x12
+ ; CHECK-I-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-I-NEXT: $x10 = COPY %lo1(s64)
+ ; CHECK-I-NEXT: $x11 = COPY %hi1(s64)
+ ; CHECK-I-NEXT: $x12 = COPY %lo2(s64)
+ ; CHECK-I-NEXT: $x13 = COPY %hi2(s64)
; CHECK-I-NEXT: PseudoCALL target-flags(riscv-call) &__umodti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-I-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-I-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
@@ -536,30 +536,30 @@ body: |
; CHECK-I-NEXT: PseudoRET implicit $x10, implicit $x11
;
; CHECK-M-LABEL: name: urem_i128
- ; CHECK-M: %hi1:_(s64) = COPY $x10
- ; CHECK-M-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-M-NEXT: %hi2:_(s64) = COPY $x12
- ; CHECK-M-NEXT: %lo2:_(s64) = COPY $x13
- ; CHECK-M-NEXT: $x10 = COPY %hi1(s64)
- ; CHECK-M-NEXT: $x11 = COPY %lo1(s64)
- ; CHECK-M-NEXT: $x12 = COPY %hi2(s64)
- ; CHECK-M-NEXT: $x13 = COPY %lo2(s64)
+ ; CHECK-M: %lo1:_(s64) = COPY $x10
+ ; CHECK-M-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-M-NEXT: %lo2:_(s64) = COPY $x12
+ ; CHECK-M-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-M-NEXT: $x10 = COPY %lo1(s64)
+ ; CHECK-M-NEXT: $x11 = COPY %hi1(s64)
+ ; CHECK-M-NEXT: $x12 = COPY %lo2(s64)
+ ; CHECK-M-NEXT: $x13 = COPY %hi2(s64)
; CHECK-M-NEXT: PseudoCALL target-flags(riscv-call) &__umodti3, implicit-def $x1, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit-def $x10, implicit-def $x11
; CHECK-M-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x10
; CHECK-M-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
; CHECK-M-NEXT: $x10 = COPY [[COPY]](s64)
; CHECK-M-NEXT: $x11 = COPY [[COPY1]](s64)
; CHECK-M-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s64) = COPY $x10
- %lo1:_(s64) = COPY $x11
- %hi2:_(s64) = COPY $x12
- %lo2:_(s64) = COPY $x13
- %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
- %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %lo1:_(s64) = COPY $x10
+ %hi1:_(s64) = COPY $x11
+ %lo2:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %lo1(s64), %hi1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %lo2(s64), %hi2(s64)
%y:_(s128) = G_UREM %x1, %x2
- %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
- $x10 = COPY %hiy(s64)
- $x11 = COPY %loy(s64)
+ %loy:_(s64), %hiy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %loy(s64)
+ $x11 = COPY %hiy(s64)
PseudoRET implicit $x10, implicit $x11
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-shl.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-shl.mir
index a2ec3b9fe4f501..1f5a7a56027e3d 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-shl.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-shl.mir
@@ -159,21 +159,21 @@ name: shl_i128
body: |
bb.0.entry:
; CHECK-LABEL: name: shl_i128
- ; CHECK: %hi1:_(s64) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x12
+ ; CHECK: %lo1:_(s64) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x12
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
- ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB %hi2, [[C]]
- ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C]], %hi2
+ ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB %lo2, [[C]]
+ ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C]], %lo2
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %hi2(s64), [[C]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %hi2(s64), [[C1]]
- ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %hi1, %hi2(s64)
- ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR %hi1, [[SUB1]](s64)
- ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL %lo1, %hi2(s64)
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %lo2(s64), [[C]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %lo2(s64), [[C1]]
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %lo1, %lo2(s64)
+ ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR %lo1, [[SUB1]](s64)
+ ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL %hi1, %lo2(s64)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL1]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s64) = G_SHL %hi1, [[SUB]](s64)
+ ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s64) = G_SHL %lo1, [[SUB]](s64)
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ICMP]], [[C3]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s64), [[SHL]], [[C2]]
@@ -182,20 +182,20 @@ body: |
; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[AND1]](s64), [[OR]], [[SHL2]]
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C5]]
- ; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[AND2]](s64), %lo1, [[SELECT1]]
+ ; CHECK-NEXT: [[SELECT2:%[0-9]+]]:_(s64) = G_SELECT [[AND2]](s64), %hi1, [[SELECT1]]
; CHECK-NEXT: $x10 = COPY [[SELECT]](s64)
; CHECK-NEXT: $x11 = COPY [[SELECT2]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s64) = COPY $x10
- %lo1:_(s64) = COPY $x11
- %hi2:_(s64) = COPY $x12
- %lo2:_(s64) = COPY $x13
- %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
- %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %lo1:_(s64) = COPY $x10
+ %hi1:_(s64) = COPY $x11
+ %lo2:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %lo1(s64), %hi1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %lo2(s64), %hi2(s64)
%y:_(s128) = G_SHL %x1, %x2
- %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
- $x10 = COPY %hiy(s64)
- $x11 = COPY %loy(s64)
+ %loy:_(s64), %hiy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %loy(s64)
+ $x11 = COPY %hiy(s64)
PseudoRET implicit $x10, implicit $x11
...
@@ -204,28 +204,28 @@ name: shl_i192
body: |
bb.0.entry:
; CHECK-LABEL: name: shl_i192
- ; CHECK: %hi1:_(s64) = COPY $x10
+ ; CHECK: %lo1:_(s64) = COPY $x10
; CHECK-NEXT: %mid1:_(s64) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 128
- ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB %hi2, [[C]]
- ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C]], %hi2
+ ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB %lo2, [[C]]
+ ; CHECK-NEXT: [[SUB1:%[0-9]+]]:_(s64) = G_SUB [[C]], %lo2
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %hi2(s64), [[C]]
- ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %hi2(s64), [[C1]]
+ ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %lo2(s64), [[C]]
+ ; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %lo2(s64), [[C1]]
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
- ; CHECK-NEXT: [[SUB2:%[0-9]+]]:_(s64) = G_SUB %hi2, [[C2]]
- ; CHECK-NEXT: [[SUB3:%[0-9]+]]:_(s64) = G_SUB [[C2]], %hi2
+ ; CHECK-NEXT: [[SUB2:%[0-9]+]]:_(s64) = G_SUB %lo2, [[C2]]
+ ; CHECK-NEXT: [[SUB3:%[0-9]+]]:_(s64) = G_SUB [[C2]], %lo2
; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %hi2(s64), [[C2]]
- ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %hi2(s64), [[C3]]
- ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %hi1, %hi2(s64)
- ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR %hi1, [[SUB3]](s64)
- ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL %mid1, %hi2(s64)
+ ; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %lo2(s64), [[C2]]
+ ; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), %lo2(s64), [[C3]]
+ ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s64) = G_SHL %lo1, %lo2(s64)
+ ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s64) = G_LSHR %lo1, [[SUB3]](s64)
+ ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s64) = G_SHL %mid1, %lo2(s64)
; CHECK-NEXT: [[OR:%[0-9]+]]:_(s64) = G_OR [[LSHR]], [[SHL1]]
; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
- ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s64) = G_SHL %hi1, [[SUB2]](s64)
+ ; CHECK-NEXT: [[SHL2:%[0-9]+]]:_(s64) = G_SHL %lo1, [[SUB2]](s64)
; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[ICMP2]], [[C5]]
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[AND]](s64), [[SHL]], [[C4]]
@@ -241,7 +241,7 @@ body: |
; CHECK-NEXT: [[C9:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), [[SUB1]](s64), [[C8]]
; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s64) = G_ICMP intpred(eq), [[SUB1]](s64), [[C9]]
- ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR %hi1, [[SUB1]](s64)
+ ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s64) = G_LSHR %lo1, [[SUB1]](s64)
; CHECK-NEXT: [[SHL3:%[0-9]+]]:_(s64) = G_SHL %mid1, [[SUB5]](s64)
; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s64) = G_OR [[LSHR1]], [[SHL3]]
; CHECK-NEXT: [[LSHR2:%[0-9]+]]:_(s64) = G_LSHR %mid1, [[SUB4]](s64)
@@ -250,10 +250,10 @@ body: |
; CHECK-NEXT: [[SELECT3:%[0-9]+]]:_(s64) = G_SELECT [[AND3]](s64), [[OR1]], [[LSHR2]]
; CHECK-NEXT: [[C11:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s64) = G_AND [[ICMP5]], [[C11]]
- ; CHECK-NEXT: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[AND4]](s64), %hi1, [[SELECT3]]
+ ; CHECK-NEXT: [[SELECT4:%[0-9]+]]:_(s64) = G_SELECT [[AND4]](s64), %lo1, [[SELECT3]]
; CHECK-NEXT: [[C12:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
- ; CHECK-NEXT: [[ICMP6:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %hi2(s64), [[C12]]
- ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s64) = G_SHL %lo1, %hi2(s64)
+ ; CHECK-NEXT: [[ICMP6:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), %lo2(s64), [[C12]]
+ ; CHECK-NEXT: [[SHL4:%[0-9]+]]:_(s64) = G_SHL %hi1, %lo2(s64)
; CHECK-NEXT: [[C13:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: [[C14:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s64) = G_AND [[ICMP6]], [[C14]]
@@ -263,7 +263,7 @@ body: |
; CHECK-NEXT: [[C16:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: [[C17:%[0-9]+]]:_(s64) = G_CONSTANT i64 64
; CHECK-NEXT: [[ICMP7:%[0-9]+]]:_(s64) = G_ICMP intpred(ult), [[SUB]](s64), [[C17]]
- ; CHECK-NEXT: [[SHL5:%[0-9]+]]:_(s64) = G_SHL %hi1, [[SUB]](s64)
+ ; CHECK-NEXT: [[SHL5:%[0-9]+]]:_(s64) = G_SHL %lo1, [[SUB]](s64)
; CHECK-NEXT: [[C18:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK-NEXT: [[C19:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND6:%[0-9]+]]:_(s64) = G_AND [[ICMP7]], [[C19]]
@@ -279,24 +279,24 @@ body: |
; CHECK-NEXT: [[SELECT9:%[0-9]+]]:_(s64) = G_SELECT [[AND9]](s64), [[OR2]], [[SELECT6]]
; CHECK-NEXT: [[C23:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND10:%[0-9]+]]:_(s64) = G_AND [[ICMP1]], [[C23]]
- ; CHECK-NEXT: [[SELECT10:%[0-9]+]]:_(s64) = G_SELECT [[AND10]](s64), %lo1, [[SELECT9]]
+ ; CHECK-NEXT: [[SELECT10:%[0-9]+]]:_(s64) = G_SELECT [[AND10]](s64), %hi1, [[SELECT9]]
; CHECK-NEXT: $x10 = COPY [[SELECT7]](s64)
; CHECK-NEXT: $x11 = COPY [[SELECT8]](s64)
; CHECK-NEXT: $x12 = COPY [[SELECT10]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s64) = COPY $x10
+ %lo1:_(s64) = COPY $x10
%mid1:_(s64) = COPY $x11
- %lo1:_(s64) = COPY $x12
- %hi2:_(s64) = COPY $x13
+ %hi1:_(s64) = COPY $x12
+ %lo2:_(s64) = COPY $x13
%mid2:_(s64) = COPY $x14
- %lo2:_(s64) = COPY $x15
- %x1:_(s192) = G_MERGE_VALUES %hi1(s64), %mid1(s64), %lo1(s64)
- %x2:_(s192) = G_MERGE_VALUES %hi2(s64), %mid2(s64), %lo2(s64)
+ %hi2:_(s64) = COPY $x15
+ %x1:_(s192) = G_MERGE_VALUES %lo1(s64), %mid1(s64), %hi1(s64)
+ %x2:_(s192) = G_MERGE_VALUES %lo2(s64), %mid2(s64), %hi2(s64)
%y:_(s192) = G_SHL %x1, %x2
- %hi:_(s64), %mid:_(s64), %lo:_(s64) = G_UNMERGE_VALUES %y(s192)
- $x10 = COPY %hi(s64)
+ %lo:_(s64), %mid:_(s64), %hi:_(s64) = G_UNMERGE_VALUES %y(s192)
+ $x10 = COPY %lo(s64)
$x11 = COPY %mid(s64)
- $x12 = COPY %lo(s64)
+ $x12 = COPY %hi(s64)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-sub.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-sub.mir
index b3c6591e0d35f0..5b8a253ca0e826 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-sub.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-sub.mir
@@ -135,27 +135,27 @@ name: sub_i128
body: |
bb.0.entry:
; CHECK-LABEL: name: sub_i128
- ; CHECK: %hi1:_(s64) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x12
- ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
- ; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s64), [[USUBO1:%[0-9]+]]:_(s64) = G_USUBO %hi1, %hi2
+ ; CHECK: %lo1:_(s64) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s64), [[USUBO1:%[0-9]+]]:_(s64) = G_USUBO %lo1, %lo2
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[USUBO1]], [[C]]
- ; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s64), [[USUBE1:%[0-9]+]]:_(s64) = G_USUBE %lo1, %lo2, [[AND]]
+ ; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s64), [[USUBE1:%[0-9]+]]:_(s64) = G_USUBE %hi1, %hi2, [[AND]]
; CHECK-NEXT: $x10 = COPY [[USUBO]](s64)
; CHECK-NEXT: $x11 = COPY [[USUBE]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s64) = COPY $x10
- %lo1:_(s64) = COPY $x11
- %hi2:_(s64) = COPY $x12
- %lo2:_(s64) = COPY $x13
- %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
- %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %lo1:_(s64) = COPY $x10
+ %hi1:_(s64) = COPY $x11
+ %lo2:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %lo1(s64), %hi1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %lo2(s64), %hi2(s64)
%y:_(s128) = G_SUB %x1, %x2
- %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
- $x10 = COPY %hiy(s64)
- $x11 = COPY %loy(s64)
+ %loy:_(s64), %hiy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %loy(s64)
+ $x11 = COPY %hiy(s64)
PseudoRET implicit $x10, implicit $x11
...
@@ -164,36 +164,36 @@ name: sub_i192
body: |
bb.0.entry:
; CHECK-LABEL: name: sub_i192
- ; CHECK: %hi1:_(s64) = COPY $x10
+ ; CHECK: %lo1:_(s64) = COPY $x10
; CHECK-NEXT: %mid1:_(s64) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
; CHECK-NEXT: %mid2:_(s64) = COPY $x14
- ; CHECK-NEXT: %lo2:_(s64) = COPY $x15
- ; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s64), [[USUBO1:%[0-9]+]]:_(s64) = G_USUBO %hi1, %hi2
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x15
+ ; CHECK-NEXT: [[USUBO:%[0-9]+]]:_(s64), [[USUBO1:%[0-9]+]]:_(s64) = G_USUBO %lo1, %lo2
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[USUBO1]], [[C]]
; CHECK-NEXT: [[USUBE:%[0-9]+]]:_(s64), [[USUBE1:%[0-9]+]]:_(s64) = G_USUBE %mid1, %mid2, [[AND]]
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[USUBE1]], [[C1]]
- ; CHECK-NEXT: [[USUBE2:%[0-9]+]]:_(s64), [[USUBE3:%[0-9]+]]:_(s64) = G_USUBE %lo1, %lo2, [[AND1]]
+ ; CHECK-NEXT: [[USUBE2:%[0-9]+]]:_(s64), [[USUBE3:%[0-9]+]]:_(s64) = G_USUBE %hi1, %hi2, [[AND1]]
; CHECK-NEXT: $x10 = COPY [[USUBO]](s64)
; CHECK-NEXT: $x11 = COPY [[USUBE]](s64)
; CHECK-NEXT: $x12 = COPY [[USUBE2]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s64) = COPY $x10
+ %lo1:_(s64) = COPY $x10
%mid1:_(s64) = COPY $x11
- %lo1:_(s64) = COPY $x12
- %hi2:_(s64) = COPY $x13
+ %hi1:_(s64) = COPY $x12
+ %lo2:_(s64) = COPY $x13
%mid2:_(s64) = COPY $x14
- %lo2:_(s64) = COPY $x15
- %x1:_(s192) = G_MERGE_VALUES %hi1(s64), %mid1(s64), %lo1(s64)
- %x2:_(s192) = G_MERGE_VALUES %hi2(s64), %mid2(s64), %lo2(s64)
+ %hi2:_(s64) = COPY $x15
+ %x1:_(s192) = G_MERGE_VALUES %lo1(s64), %mid1(s64), %hi1(s64)
+ %x2:_(s192) = G_MERGE_VALUES %lo2(s64), %mid2(s64), %hi2(s64)
%y:_(s192) = G_SUB %x1, %x2
- %hi:_(s64), %mid:_(s64), %lo:_(s64) = G_UNMERGE_VALUES %y(s192)
- $x10 = COPY %hi(s64)
+ %lo:_(s64), %mid:_(s64), %hi:_(s64) = G_UNMERGE_VALUES %y(s192)
+ $x10 = COPY %lo(s64)
$x11 = COPY %mid(s64)
- $x12 = COPY %lo(s64)
+ $x12 = COPY %hi(s64)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir
index 4f39dff8d9014a..80081bd2498a13 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-xor.mir
@@ -133,25 +133,25 @@ name: xor_i128
body: |
bb.0.entry:
; CHECK-LABEL: name: xor_i128
- ; CHECK: %hi1:_(s64) = COPY $x10
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x11
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x12
- ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR %hi1, %hi2
- ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR %lo1, %lo2
+ ; CHECK: %lo1:_(s64) = COPY $x10
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x11
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x12
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR %lo1, %lo2
+ ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR %hi1, %hi2
; CHECK-NEXT: $x10 = COPY [[XOR]](s64)
; CHECK-NEXT: $x11 = COPY [[XOR1]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11
- %hi1:_(s64) = COPY $x10
- %lo1:_(s64) = COPY $x11
- %hi2:_(s64) = COPY $x12
- %lo2:_(s64) = COPY $x13
- %x1:_(s128) = G_MERGE_VALUES %hi1(s64), %lo1(s64)
- %x2:_(s128) = G_MERGE_VALUES %hi2(s64), %lo2(s64)
+ %lo1:_(s64) = COPY $x10
+ %hi1:_(s64) = COPY $x11
+ %lo2:_(s64) = COPY $x12
+ %hi2:_(s64) = COPY $x13
+ %x1:_(s128) = G_MERGE_VALUES %lo1(s64), %hi1(s64)
+ %x2:_(s128) = G_MERGE_VALUES %lo2(s64), %hi2(s64)
%y:_(s128) = G_XOR %x1, %x2
- %hiy:_(s64), %loy:_(s64) = G_UNMERGE_VALUES %y(s128)
- $x10 = COPY %hiy(s64)
- $x11 = COPY %loy(s64)
+ %loy:_(s64), %hiy:_(s64) = G_UNMERGE_VALUES %y(s128)
+ $x10 = COPY %loy(s64)
+ $x11 = COPY %hiy(s64)
PseudoRET implicit $x10, implicit $x11
...
@@ -160,32 +160,32 @@ name: xor_i192
body: |
bb.0.entry:
; CHECK-LABEL: name: xor_i192
- ; CHECK: %hi1:_(s64) = COPY $x10
+ ; CHECK: %lo1:_(s64) = COPY $x10
; CHECK-NEXT: %mid1:_(s64) = COPY $x11
- ; CHECK-NEXT: %lo1:_(s64) = COPY $x12
- ; CHECK-NEXT: %hi2:_(s64) = COPY $x13
+ ; CHECK-NEXT: %hi1:_(s64) = COPY $x12
+ ; CHECK-NEXT: %lo2:_(s64) = COPY $x13
; CHECK-NEXT: %mid2:_(s64) = COPY $x14
- ; CHECK-NEXT: %lo2:_(s64) = COPY $x15
- ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR %hi1, %hi2
+ ; CHECK-NEXT: %hi2:_(s64) = COPY $x15
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR %lo1, %lo2
; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR %mid1, %mid2
- ; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s64) = G_XOR %lo1, %lo2
+ ; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s64) = G_XOR %hi1, %hi2
; CHECK-NEXT: $x10 = COPY [[XOR]](s64)
; CHECK-NEXT: $x11 = COPY [[XOR1]](s64)
; CHECK-NEXT: $x12 = COPY [[XOR2]](s64)
; CHECK-NEXT: PseudoRET implicit $x10, implicit $x11, implicit $x12
- %hi1:_(s64) = COPY $x10
+ %lo1:_(s64) = COPY $x10
%mid1:_(s64) = COPY $x11
- %lo1:_(s64) = COPY $x12
- %hi2:_(s64) = COPY $x13
+ %hi1:_(s64) = COPY $x12
+ %lo2:_(s64) = COPY $x13
%mid2:_(s64) = COPY $x14
- %lo2:_(s64) = COPY $x15
- %x1:_(s192) = G_MERGE_VALUES %hi1(s64), %mid1(s64), %lo1(s64)
- %x2:_(s192) = G_MERGE_VALUES %hi2(s64), %mid2(s64), %lo2(s64)
+ %hi2:_(s64) = COPY $x15
+ %x1:_(s192) = G_MERGE_VALUES %lo1(s64), %mid1(s64), %hi1(s64)
+ %x2:_(s192) = G_MERGE_VALUES %lo2(s64), %mid2(s64), %hi2(s64)
%y:_(s192) = G_XOR %x1, %x2
- %hi:_(s64), %mid:_(s64), %lo:_(s64) = G_UNMERGE_VALUES %y(s192)
- $x10 = COPY %hi(s64)
+ %lo:_(s64), %mid:_(s64), %hi:_(s64) = G_UNMERGE_VALUES %y(s192)
+ $x10 = COPY %lo(s64)
$x11 = COPY %mid(s64)
- $x12 = COPY %lo(s64)
+ $x12 = COPY %hi(s64)
PseudoRET implicit $x10, implicit $x11, implicit $x12
...
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