[llvm] 13454a6 - [RISCV] Compress stack insts by adjust offset.
Jie Fu via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 17 20:01:42 PDT 2023
Author: laichunfeng
Date: 2023-08-18T10:49:53+08:00
New Revision: 13454a6e8744e510212e750b7a7dc9da8c41943c
URL: https://github.com/llvm/llvm-project/commit/13454a6e8744e510212e750b7a7dc9da8c41943c
DIFF: https://github.com/llvm/llvm-project/commit/13454a6e8744e510212e750b7a7dc9da8c41943c.diff
LOG: [RISCV] Compress stack insts by adjust offset.
For callee saved/restored operations, they mostly use the
following inst patterns,
sw rs2, offset(x2)
sd rs2, offset(x2)
fsw rs2, offset(x2)
fsd rs2, offset(x2)
lw rd, offset(x2)
ld rd, offset(x2)
flw rd, offset(x2)
fld rd, offset(x2)
and offset decides whether the instructions can be compressed.
now offset 2032 will be set by default if stacksize is bigger
than 2^12-1 to save and restore callee saved register, so it
will prevent all the callee saved/restored stack insts be
compressed.
Allocating proper offset for stack insts is useful to make
them be compressed.
Reviewed By: craig.topper, wangpc
Differential Revision: https://reviews.llvm.org/D157373
Added:
llvm/test/CodeGen/RISCV/stack-inst-compress.mir
Modified:
llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index da5f18bf7c5e11..9e90c1bbc759e5 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -1301,13 +1301,41 @@ RISCVFrameLowering::getFirstSPAdjustAmount(const MachineFunction &MF) const {
// Return the FirstSPAdjustAmount if the StackSize can not fit in a signed
// 12-bit and there exists a callee-saved register needing to be pushed.
if (!isInt<12>(StackSize) && (CSI.size() > 0)) {
- // FirstSPAdjustAmount is chosen as (2048 - StackAlign) because 2048 will
- // cause sp = sp + 2048 in the epilogue to be split into multiple
+ // FirstSPAdjustAmount is chosen at most as (2048 - StackAlign) because
+ // 2048 will cause sp = sp + 2048 in the epilogue to be split into multiple
// instructions. Offsets smaller than 2048 can fit in a single load/store
// instruction, and we have to stick with the stack alignment. 2048 has
// 16-byte alignment. The stack alignment for RV32 and RV64 is 16 and for
// RV32E it is 4. So (2048 - StackAlign) will satisfy the stack alignment.
- return 2048 - getStackAlign().value();
+ const uint64_t StackAlign = getStackAlign().value();
+
+ // Amount of (2048 - StackAlign) will prevent callee saved and restored
+ // instructions be compressed, so try to adjust the amount to the largest
+ // offset that stack compression instructions accept when target supports
+ // compression instructions.
+ if (STI.hasStdExtCOrZca()) {
+ // riscv32: c.lwsp rd, offset[7:2] => 2^(6 + 2)
+ // c.swsp rs2, offset[7:2] => 2^(6 + 2)
+ // c.flwsp rd, offset[7:2] => 2^(6 + 2)
+ // c.fswsp rs2, offset[7:2] => 2^(6 + 2)
+ // riscv64: c.ldsp rd, offset[8:3] => 2^(6 + 3)
+ // c.sdsp rs2, offset[8:3] => 2^(6 + 3)
+ // c.fldsp rd, offset[8:3] => 2^(6 + 3)
+ // c.fsdsp rs2, offset[8:3] => 2^(6 + 3)
+ const uint64_t RVCompressLen = STI.getXLen() * 8;
+ // Compared with amount (2048 - StackAlign), StackSize needs to
+ // satisfy the following conditions to avoid using more instructions
+ // to adjust the sp after adjusting the amount, such as
+ // StackSize meets the condition (StackSize <= 2048 + RVCompressLen),
+ // case1: Amount is 2048 - StackAlign: use addi + addi to adjust sp.
+ // case2: Amount is RVCompressLen: use addi + addi to adjust sp.
+ if (StackSize <= 2047 + RVCompressLen ||
+ (StackSize > 2048 * 2 - StackAlign &&
+ StackSize <= 2047 * 2 + RVCompressLen) ||
+ StackSize > 2048 * 3 - StackAlign)
+ return RVCompressLen;
+ }
+ return 2048 - StackAlign;
}
return 0;
}
diff --git a/llvm/test/CodeGen/RISCV/stack-inst-compress.mir b/llvm/test/CodeGen/RISCV/stack-inst-compress.mir
new file mode 100644
index 00000000000000..44a30b77f2e460
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/stack-inst-compress.mir
@@ -0,0 +1,307 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
+# RUN: llc -march=riscv32 -x mir -run-pass=prologepilog -verify-machineinstrs < %s \
+# RUN: | FileCheck -check-prefixes=CHECK-RV32-NO-COM %s
+# RUN: llc -march=riscv32 -mattr=+c -x mir -run-pass=prologepilog \
+# RUN: -verify-machineinstrs < %s | FileCheck -check-prefixes=CHECK-RV32-COM %s
+# RUN: llc -march=riscv64 -x mir -run-pass=prologepilog -verify-machineinstrs < %s \
+# RUN: | FileCheck -check-prefixes=CHECK-RV64-NO-COM %s
+# RUN: llc -march=riscv64 -mattr=+c -x mir -run-pass=prologepilog \
+# RUN: -verify-machineinstrs < %s | FileCheck -check-prefixes=CHECK-RV64-COM %s
+--- |
+ define dso_local void @_Z15stack_size_2048v() {
+ entry:
+ ret void
+ }
+
+ declare dso_local void @_Z6calleePi(ptr noundef)
+
+ define dso_local void @_Z15stack_size_4096v() {
+ entry:
+ ret void
+ }
+
+ define dso_local void @_Z15stack_size_8192v() {
+ entry:
+ ret void
+ }
+
+...
+---
+name: _Z15stack_size_2048v
+alignment: 2
+tracksRegLiveness: true
+frameInfo:
+ maxAlignment: 4
+ hasCalls: true
+ localFrameSize: 2048
+stack:
+ - { id: 0, size: 2048, alignment: 4, local-offset: -2048 }
+machineFunctionInfo:
+ varArgsFrameIndex: 0
+ varArgsSaveSize: 0
+body: |
+ bb.0.entry:
+ ; CHECK-RV32-NO-COM-LABEL: name: _Z15stack_size_2048v
+ ; CHECK-RV32-NO-COM: liveins: $x1
+ ; CHECK-RV32-NO-COM-NEXT: {{ $}}
+ ; CHECK-RV32-NO-COM-NEXT: $x2 = frame-setup ADDI $x2, -2032
+ ; CHECK-RV32-NO-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 2032
+ ; CHECK-RV32-NO-COM-NEXT: SW killed $x1, $x2, 2028 :: (store (s32) into %stack.1)
+ ; CHECK-RV32-NO-COM-NEXT: frame-setup CFI_INSTRUCTION offset $x1, -4
+ ; CHECK-RV32-NO-COM-NEXT: $x2 = frame-setup ADDI $x2, -32
+ ; CHECK-RV32-NO-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 2064
+ ; CHECK-RV32-NO-COM-NEXT: renamable $x10 = ADDI $x2, 12
+ ; CHECK-RV32-NO-COM-NEXT: PseudoCALL target-flags(riscv-call) @_Z6calleePi, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ ; CHECK-RV32-NO-COM-NEXT: $x2 = frame-destroy ADDI $x2, 32
+ ; CHECK-RV32-NO-COM-NEXT: $x1 = LW $x2, 2028 :: (load (s32) from %stack.1)
+ ; CHECK-RV32-NO-COM-NEXT: $x2 = frame-destroy ADDI $x2, 2032
+ ; CHECK-RV32-NO-COM-NEXT: PseudoRET
+ ;
+ ; CHECK-RV32-COM-LABEL: name: _Z15stack_size_2048v
+ ; CHECK-RV32-COM: liveins: $x1
+ ; CHECK-RV32-COM-NEXT: {{ $}}
+ ; CHECK-RV32-COM-NEXT: $x2 = frame-setup ADDI $x2, -256
+ ; CHECK-RV32-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 256
+ ; CHECK-RV32-COM-NEXT: SW killed $x1, $x2, 252 :: (store (s32) into %stack.1)
+ ; CHECK-RV32-COM-NEXT: frame-setup CFI_INSTRUCTION offset $x1, -4
+ ; CHECK-RV32-COM-NEXT: $x2 = frame-setup ADDI $x2, -1808
+ ; CHECK-RV32-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 2064
+ ; CHECK-RV32-COM-NEXT: renamable $x10 = ADDI $x2, 12
+ ; CHECK-RV32-COM-NEXT: PseudoCALL target-flags(riscv-call) @_Z6calleePi, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ ; CHECK-RV32-COM-NEXT: $x2 = frame-destroy ADDI $x2, 1808
+ ; CHECK-RV32-COM-NEXT: $x1 = LW $x2, 252 :: (load (s32) from %stack.1)
+ ; CHECK-RV32-COM-NEXT: $x2 = frame-destroy ADDI $x2, 256
+ ; CHECK-RV32-COM-NEXT: PseudoRET
+ ;
+ ; CHECK-RV64-NO-COM-LABEL: name: _Z15stack_size_2048v
+ ; CHECK-RV64-NO-COM: liveins: $x1
+ ; CHECK-RV64-NO-COM-NEXT: {{ $}}
+ ; CHECK-RV64-NO-COM-NEXT: $x2 = frame-setup ADDI $x2, -2032
+ ; CHECK-RV64-NO-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 2032
+ ; CHECK-RV64-NO-COM-NEXT: SD killed $x1, $x2, 2024 :: (store (s64) into %stack.1)
+ ; CHECK-RV64-NO-COM-NEXT: frame-setup CFI_INSTRUCTION offset $x1, -8
+ ; CHECK-RV64-NO-COM-NEXT: $x2 = frame-setup ADDI $x2, -32
+ ; CHECK-RV64-NO-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 2064
+ ; CHECK-RV64-NO-COM-NEXT: renamable $x10 = ADDI $x2, 8
+ ; CHECK-RV64-NO-COM-NEXT: PseudoCALL target-flags(riscv-call) @_Z6calleePi, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ ; CHECK-RV64-NO-COM-NEXT: $x2 = frame-destroy ADDI $x2, 32
+ ; CHECK-RV64-NO-COM-NEXT: $x1 = LD $x2, 2024 :: (load (s64) from %stack.1)
+ ; CHECK-RV64-NO-COM-NEXT: $x2 = frame-destroy ADDI $x2, 2032
+ ; CHECK-RV64-NO-COM-NEXT: PseudoRET
+ ;
+ ; CHECK-RV64-COM-LABEL: name: _Z15stack_size_2048v
+ ; CHECK-RV64-COM: liveins: $x1
+ ; CHECK-RV64-COM-NEXT: {{ $}}
+ ; CHECK-RV64-COM-NEXT: $x2 = frame-setup ADDI $x2, -512
+ ; CHECK-RV64-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 512
+ ; CHECK-RV64-COM-NEXT: SD killed $x1, $x2, 504 :: (store (s64) into %stack.1)
+ ; CHECK-RV64-COM-NEXT: frame-setup CFI_INSTRUCTION offset $x1, -8
+ ; CHECK-RV64-COM-NEXT: $x2 = frame-setup ADDI $x2, -1552
+ ; CHECK-RV64-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 2064
+ ; CHECK-RV64-COM-NEXT: renamable $x10 = ADDI $x2, 8
+ ; CHECK-RV64-COM-NEXT: PseudoCALL target-flags(riscv-call) @_Z6calleePi, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ ; CHECK-RV64-COM-NEXT: $x2 = frame-destroy ADDI $x2, 1552
+ ; CHECK-RV64-COM-NEXT: $x1 = LD $x2, 504 :: (load (s64) from %stack.1)
+ ; CHECK-RV64-COM-NEXT: $x2 = frame-destroy ADDI $x2, 512
+ ; CHECK-RV64-COM-NEXT: PseudoRET
+ ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2
+ renamable $x10 = ADDI %stack.0, 0
+ PseudoCALL target-flags(riscv-call) @_Z6calleePi, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
+ PseudoRET
+
+...
+---
+name: _Z15stack_size_4096v
+alignment: 2
+tracksRegLiveness: true
+frameInfo:
+ maxAlignment: 4
+ hasCalls: true
+ localFrameSize: 4096
+stack:
+ - { id: 0, size: 4096, alignment: 4, local-offset: -4096 }
+machineFunctionInfo:
+ varArgsFrameIndex: 0
+ varArgsSaveSize: 0
+body: |
+ bb.0.entry:
+ ; CHECK-RV32-NO-COM-LABEL: name: _Z15stack_size_4096v
+ ; CHECK-RV32-NO-COM: liveins: $x1
+ ; CHECK-RV32-NO-COM-NEXT: {{ $}}
+ ; CHECK-RV32-NO-COM-NEXT: $x2 = frame-setup ADDI $x2, -2032
+ ; CHECK-RV32-NO-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 2032
+ ; CHECK-RV32-NO-COM-NEXT: SW killed $x1, $x2, 2028 :: (store (s32) into %stack.1)
+ ; CHECK-RV32-NO-COM-NEXT: frame-setup CFI_INSTRUCTION offset $x1, -4
+ ; CHECK-RV32-NO-COM-NEXT: $x2 = frame-setup ADDI $x2, -2048
+ ; CHECK-RV32-NO-COM-NEXT: $x2 = frame-setup ADDI killed $x2, -32
+ ; CHECK-RV32-NO-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 4112
+ ; CHECK-RV32-NO-COM-NEXT: renamable $x10 = ADDI $x2, 12
+ ; CHECK-RV32-NO-COM-NEXT: PseudoCALL target-flags(riscv-call) @_Z6calleePi, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ ; CHECK-RV32-NO-COM-NEXT: $x2 = frame-destroy ADDI $x2, 2032
+ ; CHECK-RV32-NO-COM-NEXT: $x2 = frame-destroy ADDI killed $x2, 48
+ ; CHECK-RV32-NO-COM-NEXT: $x1 = LW $x2, 2028 :: (load (s32) from %stack.1)
+ ; CHECK-RV32-NO-COM-NEXT: $x2 = frame-destroy ADDI $x2, 2032
+ ; CHECK-RV32-NO-COM-NEXT: PseudoRET
+ ;
+ ; CHECK-RV32-COM-LABEL: name: _Z15stack_size_4096v
+ ; CHECK-RV32-COM: liveins: $x1
+ ; CHECK-RV32-COM-NEXT: {{ $}}
+ ; CHECK-RV32-COM-NEXT: $x2 = frame-setup ADDI $x2, -256
+ ; CHECK-RV32-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 256
+ ; CHECK-RV32-COM-NEXT: SW killed $x1, $x2, 252 :: (store (s32) into %stack.1)
+ ; CHECK-RV32-COM-NEXT: frame-setup CFI_INSTRUCTION offset $x1, -4
+ ; CHECK-RV32-COM-NEXT: $x2 = frame-setup ADDI $x2, -2048
+ ; CHECK-RV32-COM-NEXT: $x2 = frame-setup ADDI killed $x2, -1808
+ ; CHECK-RV32-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 4112
+ ; CHECK-RV32-COM-NEXT: renamable $x10 = ADDI $x2, 12
+ ; CHECK-RV32-COM-NEXT: PseudoCALL target-flags(riscv-call) @_Z6calleePi, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ ; CHECK-RV32-COM-NEXT: $x2 = frame-destroy ADDI $x2, 2032
+ ; CHECK-RV32-COM-NEXT: $x2 = frame-destroy ADDI killed $x2, 1824
+ ; CHECK-RV32-COM-NEXT: $x1 = LW $x2, 252 :: (load (s32) from %stack.1)
+ ; CHECK-RV32-COM-NEXT: $x2 = frame-destroy ADDI $x2, 256
+ ; CHECK-RV32-COM-NEXT: PseudoRET
+ ;
+ ; CHECK-RV64-NO-COM-LABEL: name: _Z15stack_size_4096v
+ ; CHECK-RV64-NO-COM: liveins: $x1
+ ; CHECK-RV64-NO-COM-NEXT: {{ $}}
+ ; CHECK-RV64-NO-COM-NEXT: $x2 = frame-setup ADDI $x2, -2032
+ ; CHECK-RV64-NO-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 2032
+ ; CHECK-RV64-NO-COM-NEXT: SD killed $x1, $x2, 2024 :: (store (s64) into %stack.1)
+ ; CHECK-RV64-NO-COM-NEXT: frame-setup CFI_INSTRUCTION offset $x1, -8
+ ; CHECK-RV64-NO-COM-NEXT: $x2 = frame-setup ADDI $x2, -2048
+ ; CHECK-RV64-NO-COM-NEXT: $x2 = frame-setup ADDI killed $x2, -32
+ ; CHECK-RV64-NO-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 4112
+ ; CHECK-RV64-NO-COM-NEXT: renamable $x10 = ADDI $x2, 8
+ ; CHECK-RV64-NO-COM-NEXT: PseudoCALL target-flags(riscv-call) @_Z6calleePi, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ ; CHECK-RV64-NO-COM-NEXT: $x2 = frame-destroy ADDI $x2, 2032
+ ; CHECK-RV64-NO-COM-NEXT: $x2 = frame-destroy ADDI killed $x2, 48
+ ; CHECK-RV64-NO-COM-NEXT: $x1 = LD $x2, 2024 :: (load (s64) from %stack.1)
+ ; CHECK-RV64-NO-COM-NEXT: $x2 = frame-destroy ADDI $x2, 2032
+ ; CHECK-RV64-NO-COM-NEXT: PseudoRET
+ ;
+ ; CHECK-RV64-COM-LABEL: name: _Z15stack_size_4096v
+ ; CHECK-RV64-COM: liveins: $x1
+ ; CHECK-RV64-COM-NEXT: {{ $}}
+ ; CHECK-RV64-COM-NEXT: $x2 = frame-setup ADDI $x2, -512
+ ; CHECK-RV64-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 512
+ ; CHECK-RV64-COM-NEXT: SD killed $x1, $x2, 504 :: (store (s64) into %stack.1)
+ ; CHECK-RV64-COM-NEXT: frame-setup CFI_INSTRUCTION offset $x1, -8
+ ; CHECK-RV64-COM-NEXT: $x2 = frame-setup ADDI $x2, -2048
+ ; CHECK-RV64-COM-NEXT: $x2 = frame-setup ADDI killed $x2, -1552
+ ; CHECK-RV64-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 4112
+ ; CHECK-RV64-COM-NEXT: renamable $x10 = ADDI $x2, 8
+ ; CHECK-RV64-COM-NEXT: PseudoCALL target-flags(riscv-call) @_Z6calleePi, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ ; CHECK-RV64-COM-NEXT: $x2 = frame-destroy ADDI $x2, 2032
+ ; CHECK-RV64-COM-NEXT: $x2 = frame-destroy ADDI killed $x2, 1568
+ ; CHECK-RV64-COM-NEXT: $x1 = LD $x2, 504 :: (load (s64) from %stack.1)
+ ; CHECK-RV64-COM-NEXT: $x2 = frame-destroy ADDI $x2, 512
+ ; CHECK-RV64-COM-NEXT: PseudoRET
+ ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2
+ renamable $x10 = ADDI %stack.0, 0
+ PseudoCALL target-flags(riscv-call) @_Z6calleePi, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
+ PseudoRET
+
+...
+---
+name: _Z15stack_size_8192v
+alignment: 2
+tracksRegLiveness: true
+frameInfo:
+ maxAlignment: 4
+ hasCalls: true
+ localFrameSize: 8192
+stack:
+ - { id: 0, size: 8192, alignment: 4, local-offset: -8192 }
+machineFunctionInfo:
+ varArgsFrameIndex: 0
+ varArgsSaveSize: 0
+body: |
+ bb.0.entry:
+ ; CHECK-RV32-NO-COM-LABEL: name: _Z15stack_size_8192v
+ ; CHECK-RV32-NO-COM: liveins: $x1
+ ; CHECK-RV32-NO-COM-NEXT: {{ $}}
+ ; CHECK-RV32-NO-COM-NEXT: $x2 = frame-setup ADDI $x2, -2032
+ ; CHECK-RV32-NO-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 2032
+ ; CHECK-RV32-NO-COM-NEXT: SW killed $x1, $x2, 2028 :: (store (s32) into %stack.1)
+ ; CHECK-RV32-NO-COM-NEXT: frame-setup CFI_INSTRUCTION offset $x1, -4
+ ; CHECK-RV32-NO-COM-NEXT: $x10 = frame-setup LUI 2
+ ; CHECK-RV32-NO-COM-NEXT: $x10 = frame-setup ADDI killed $x10, -2016
+ ; CHECK-RV32-NO-COM-NEXT: $x2 = frame-setup SUB $x2, killed $x10
+ ; CHECK-RV32-NO-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8208
+ ; CHECK-RV32-NO-COM-NEXT: renamable $x10 = ADDI $x2, 12
+ ; CHECK-RV32-NO-COM-NEXT: PseudoCALL target-flags(riscv-call) @_Z6calleePi, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ ; CHECK-RV32-NO-COM-NEXT: $x10 = frame-destroy LUI 2
+ ; CHECK-RV32-NO-COM-NEXT: $x10 = frame-destroy ADDI killed $x10, -2016
+ ; CHECK-RV32-NO-COM-NEXT: $x2 = frame-destroy ADD $x2, killed $x10
+ ; CHECK-RV32-NO-COM-NEXT: $x1 = LW $x2, 2028 :: (load (s32) from %stack.1)
+ ; CHECK-RV32-NO-COM-NEXT: $x2 = frame-destroy ADDI $x2, 2032
+ ; CHECK-RV32-NO-COM-NEXT: PseudoRET
+ ;
+ ; CHECK-RV32-COM-LABEL: name: _Z15stack_size_8192v
+ ; CHECK-RV32-COM: liveins: $x1
+ ; CHECK-RV32-COM-NEXT: {{ $}}
+ ; CHECK-RV32-COM-NEXT: $x2 = frame-setup ADDI $x2, -256
+ ; CHECK-RV32-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 256
+ ; CHECK-RV32-COM-NEXT: SW killed $x1, $x2, 252 :: (store (s32) into %stack.1)
+ ; CHECK-RV32-COM-NEXT: frame-setup CFI_INSTRUCTION offset $x1, -4
+ ; CHECK-RV32-COM-NEXT: $x10 = frame-setup LUI 2
+ ; CHECK-RV32-COM-NEXT: $x10 = frame-setup ADDI killed $x10, -240
+ ; CHECK-RV32-COM-NEXT: $x2 = frame-setup SUB $x2, killed $x10
+ ; CHECK-RV32-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8208
+ ; CHECK-RV32-COM-NEXT: renamable $x10 = ADDI $x2, 12
+ ; CHECK-RV32-COM-NEXT: PseudoCALL target-flags(riscv-call) @_Z6calleePi, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ ; CHECK-RV32-COM-NEXT: $x10 = frame-destroy LUI 2
+ ; CHECK-RV32-COM-NEXT: $x10 = frame-destroy ADDI killed $x10, -240
+ ; CHECK-RV32-COM-NEXT: $x2 = frame-destroy ADD $x2, killed $x10
+ ; CHECK-RV32-COM-NEXT: $x1 = LW $x2, 252 :: (load (s32) from %stack.1)
+ ; CHECK-RV32-COM-NEXT: $x2 = frame-destroy ADDI $x2, 256
+ ; CHECK-RV32-COM-NEXT: PseudoRET
+ ;
+ ; CHECK-RV64-NO-COM-LABEL: name: _Z15stack_size_8192v
+ ; CHECK-RV64-NO-COM: liveins: $x1
+ ; CHECK-RV64-NO-COM-NEXT: {{ $}}
+ ; CHECK-RV64-NO-COM-NEXT: $x2 = frame-setup ADDI $x2, -2032
+ ; CHECK-RV64-NO-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 2032
+ ; CHECK-RV64-NO-COM-NEXT: SD killed $x1, $x2, 2024 :: (store (s64) into %stack.1)
+ ; CHECK-RV64-NO-COM-NEXT: frame-setup CFI_INSTRUCTION offset $x1, -8
+ ; CHECK-RV64-NO-COM-NEXT: $x10 = frame-setup LUI 2
+ ; CHECK-RV64-NO-COM-NEXT: $x10 = frame-setup ADDIW killed $x10, -2016
+ ; CHECK-RV64-NO-COM-NEXT: $x2 = frame-setup SUB $x2, killed $x10
+ ; CHECK-RV64-NO-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8208
+ ; CHECK-RV64-NO-COM-NEXT: renamable $x10 = ADDI $x2, 8
+ ; CHECK-RV64-NO-COM-NEXT: PseudoCALL target-flags(riscv-call) @_Z6calleePi, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ ; CHECK-RV64-NO-COM-NEXT: $x10 = frame-destroy LUI 2
+ ; CHECK-RV64-NO-COM-NEXT: $x10 = frame-destroy ADDIW killed $x10, -2016
+ ; CHECK-RV64-NO-COM-NEXT: $x2 = frame-destroy ADD $x2, killed $x10
+ ; CHECK-RV64-NO-COM-NEXT: $x1 = LD $x2, 2024 :: (load (s64) from %stack.1)
+ ; CHECK-RV64-NO-COM-NEXT: $x2 = frame-destroy ADDI $x2, 2032
+ ; CHECK-RV64-NO-COM-NEXT: PseudoRET
+ ;
+ ; CHECK-RV64-COM-LABEL: name: _Z15stack_size_8192v
+ ; CHECK-RV64-COM: liveins: $x1
+ ; CHECK-RV64-COM-NEXT: {{ $}}
+ ; CHECK-RV64-COM-NEXT: $x2 = frame-setup ADDI $x2, -512
+ ; CHECK-RV64-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 512
+ ; CHECK-RV64-COM-NEXT: SD killed $x1, $x2, 504 :: (store (s64) into %stack.1)
+ ; CHECK-RV64-COM-NEXT: frame-setup CFI_INSTRUCTION offset $x1, -8
+ ; CHECK-RV64-COM-NEXT: $x10 = frame-setup LUI 2
+ ; CHECK-RV64-COM-NEXT: $x10 = frame-setup ADDIW killed $x10, -496
+ ; CHECK-RV64-COM-NEXT: $x2 = frame-setup SUB $x2, killed $x10
+ ; CHECK-RV64-COM-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8208
+ ; CHECK-RV64-COM-NEXT: renamable $x10 = ADDI $x2, 8
+ ; CHECK-RV64-COM-NEXT: PseudoCALL target-flags(riscv-call) @_Z6calleePi, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ ; CHECK-RV64-COM-NEXT: $x10 = frame-destroy LUI 2
+ ; CHECK-RV64-COM-NEXT: $x10 = frame-destroy ADDIW killed $x10, -496
+ ; CHECK-RV64-COM-NEXT: $x2 = frame-destroy ADD $x2, killed $x10
+ ; CHECK-RV64-COM-NEXT: $x1 = LD $x2, 504 :: (load (s64) from %stack.1)
+ ; CHECK-RV64-COM-NEXT: $x2 = frame-destroy ADDI $x2, 512
+ ; CHECK-RV64-COM-NEXT: PseudoRET
+ ADJCALLSTACKDOWN 0, 0, implicit-def dead $x2, implicit $x2
+ renamable $x10 = ADDI %stack.0, 0
+ PseudoCALL target-flags(riscv-call) @_Z6calleePi, csr_ilp32_lp64, implicit-def dead $x1, implicit killed $x10, implicit-def $x2
+ ADJCALLSTACKUP 0, 0, implicit-def dead $x2, implicit $x2
+ PseudoRET
+
+...
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