[PATCH] D158059: [AMDGPU/wmma] - Disable 3-address syntax for f16
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 17 15:33:50 PDT 2023
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/VOP3PInstructions.td:863
let Mnemonic = Instr, mayRaiseFPException = 0, ReadsModeReg = 0 in {
- let Constraints = WMMAConstraints2Addr, isConvertibleToThreeAddress = 1 in {
+ let Constraints = WMMAConstraints2Addr, isConvertibleToThreeAddress = isConvertableTo3Addr in {
def _twoaddr_w32 : VOP3P_Pseudo<Instr # Suffix, WMMAProfile>;
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OutOfCache wrote:
> arsenm wrote:
> > Shouldn’t lie about properties, disable at a different point?
> Where would you suggest?
Does this happen in two address instructions? I assume the current heuristic assumes a simple register and isn’t accounting for large tuple increasing pressure
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https://reviews.llvm.org/D158059/new/
https://reviews.llvm.org/D158059
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