[PATCH] D155472: [DAG] Attempt shl narrowing in SimplifyDemandedBits (WIP)

[Noah Goldstein via Phabricator via llvm-commits]

goldstein.w.n added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:1771
+           TLO.DAG.MaskedValueIsZero(
+               Op0, APInt::getHighBitsSet(BitWidth, ShAmt + (BitWidth / 2))))) {
+        EVT HalfVT = EVT::getIntegerVT(*TLO.DAG.getContext(), BitWidth / 2);
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I'd argue the `MakeValueIsZero` check should be after all the other checks (including the profitability ones) as the recursion can be expensive. Although its probably not a huge deal either way.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D155472/new/

https://reviews.llvm.org/D155472