[PATCH] D158160: [RISCV] Add test case showing vmerge fold miscompile with tail policy

[Luke Lau via Phabricator via llvm-commits]

luke created this revision.
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Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D158160

Files:
  llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll


Index: llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
===================================================================
--- llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
+++ llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
@@ -1065,3 +1065,15 @@
   ret <vscale x 2 x i32> %b
 }
 
+; FIXME: The vadd's new policy should be tail undisturbed since the false op of
+; the vmerge moves from the the body to the tail, and we need to preserve it.
+define <vscale x 2 x i32> @vmerge_larger_vl_false_becomes_tail(<vscale x 2 x i32> %false, <vscale x 2 x i32> %x, <vscale x 2 x i32> %y, <vscale x 2 x i1> %m) {
+; CHECK-LABEL: vmerge_larger_vl_false_becomes_tail:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vsetivli zero, 2, e32, m1, ta, mu
+; CHECK-NEXT:    vadd.vv v8, v9, v10, v0.t
+; CHECK-NEXT:    ret
+  %a = call <vscale x 2 x i32> @llvm.riscv.vadd.nxv2i32.nxv2i32(<vscale x 2 x i32> undef, <vscale x 2 x i32> %x, <vscale x 2 x i32> %y, i64 2)
+  %b = call <vscale x 2 x i32> @llvm.riscv.vmerge.nxv2i32.nxv2i32(<vscale x 2 x i32> undef, <vscale x 2 x i32> %false, <vscale x 2 x i32> %a, <vscale x 2 x i1> %m, i64 3)
+  ret <vscale x 2 x i32> %b
+}


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