[llvm] 5a8ecd6 - [AMDGPU] More verifier checks for llvm.amdgcn.cs.chain

[Diana Picus via llvm-commits]

Author: Diana Picus
Date: 2023-08-17T09:37:20+02:00
New Revision: 5a8ecd6456c8cd97df668abff8a82131fc99b7a4

URL: https://github.com/llvm/llvm-project/commit/5a8ecd6456c8cd97df668abff8a82131fc99b7a4
DIFF: https://github.com/llvm/llvm-project/commit/5a8ecd6456c8cd97df668abff8a82131fc99b7a4.diff

LOG: [AMDGPU] More verifier checks for llvm.amdgcn.cs.chain

Check that the SGPR arguments have the `inreg` attribute and the VGPR
arguments don't.

Differential Revision: https://reviews.llvm.org/D156409

Added: 
    

Modified: 
    llvm/lib/IR/Verifier.cpp
    llvm/test/Verifier/AMDGPU/intrinsic-amdgpu-cs-chain.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp
index 064b9b2181f082..dff3cef96dfba6 100644
--- a/llvm/lib/IR/Verifier.cpp
+++ b/llvm/lib/IR/Verifier.cpp
@@ -5919,6 +5919,11 @@ void Verifier::visitIntrinsicCall(Intrinsic::ID ID, CallBase &Call) {
                   &Call);
       break;
     }
+
+    Check(Call.paramHasAttr(2, Attribute::InReg),
+          "SGPR arguments must have the `inreg` attribute", &Call);
+    Check(!Call.paramHasAttr(3, Attribute::InReg),
+          "VGPR arguments must not have the `inreg` attribute", &Call);
     break;
   }
   case Intrinsic::experimental_convergence_entry:

diff  --git a/llvm/test/Verifier/AMDGPU/intrinsic-amdgpu-cs-chain.ll b/llvm/test/Verifier/AMDGPU/intrinsic-amdgpu-cs-chain.ll
index 7230b9d225a8b7..4a284ecc823834 100644
--- a/llvm/test/Verifier/AMDGPU/intrinsic-amdgpu-cs-chain.ll
+++ b/llvm/test/Verifier/AMDGPU/intrinsic-amdgpu-cs-chain.ll
@@ -10,6 +10,20 @@ define amdgpu_cs_chain void @bad_flags(ptr %fn, i32 %exec, <4 x i32> inreg %sgpr
   unreachable
 }
 
+define amdgpu_cs_chain void @bad_vgpr_args(ptr %fn, i32 %exec, <4 x i32> inreg %sgpr, { ptr, <3 x i32> } inreg %vgpr) {
+  ; CHECK: VGPR arguments must not have the `inreg` attribute
+  ; CHECK-NEXT: @llvm.amdgcn.cs.chain
+  call void(ptr, i32, <4 x i32>, { ptr, <3 x i32> }, i32, ...) @llvm.amdgcn.cs.chain(ptr %fn, i32 %exec, <4 x i32> inreg %sgpr, { ptr, <3 x i32> } inreg %vgpr, i32 0)
+  unreachable
+}
+
+define amdgpu_cs_chain void @bad_sgpr_args(ptr %fn, i32 %exec, <4 x i32> %sgpr, { ptr, <3 x i32> } %vgpr) {
+  ; CHECK: SGPR arguments must have the `inreg` attribute
+  ; CHECK-NEXT: @llvm.amdgcn.cs.chain
+  call void(ptr, i32, <4 x i32>, { ptr, <3 x i32> }, i32, ...) @llvm.amdgcn.cs.chain(ptr %fn, i32 %exec, <4 x i32> %sgpr, { ptr, <3 x i32> } %vgpr, i32 0)
+  unreachable
+}
+
 define amdgpu_cs_chain void @bad_exec(ptr %fn, i32 %exec, <4 x i32> inreg %sgpr, { ptr, <3 x i32> } %vgpr, i32 %flags) {
   ; CHECK: Intrinsic called with incompatible signature
   ; CHECK-NEXT: @llvm.amdgcn.cs.chain