[PATCH] D158147: [RFC][GlobalISel] convergence control tokens and intrinsics

Sameer Sahasrabuddhe via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 16 23:28:49 PDT 2023


sameerds created this revision.
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This is an early attempt and a call for feedback on adding support in GlobalISel
for convergence control tokens:

- IRTranslator converts LLVM token type to LLT::token(), which is an alias for the s0 type. These show up as implicit uses on convergent operations.
- Legalizer removes all implicit uses of convergence control tokens, since they are not meant to be translated to actual target instructions.

TODO: Verify static rules of convergence control in the MachineVerifier.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D158147

Files:
  llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
  llvm/include/llvm/CodeGen/LowLevelType.h
  llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
  llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  llvm/lib/CodeGen/LowLevelTypeUtils.cpp
  llvm/lib/CodeGen/MIRParser/MIParser.cpp
  llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
  llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/convergence-tokens.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-convergence-tokens.ll
  llvm/test/CodeGen/MIR/AArch64/parse-low-level-type-invalid4.mir
  llvm/test/CodeGen/MIR/AArch64/parse-low-level-type-invalid6.mir

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