[PATCH] D158099: AMDGPU: Fix more unsafe rsq formation

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: AMDGPU, foad, rampitec.
Herald added subscribers: StephenFan, kerbowa, hiraditya, tpr, dstuttard, yaxunl, jvesely, kzhuravl.
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Introducing rsq contract flags is wrong, and also requires some level
of approximate functions. AMDGPUCodeGenPrepare already should handle
the f32 cases with appropriate flags, and I don't see how new
situations to handle would arise during legalization (other than cases
involving the rcp intrinsic, which instcombine tries to
handle). AMDGPUCodeGenPrepare does need to learn better handling of
rcp/rsq for f64 though, which we never bothered to handle well.

      

Removes another obstacle to correctly lowering sqrt.


https://reviews.llvm.org/D158099

Files:
  llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.h
  llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/combine-rsq.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
  llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
  llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.ll
  llvm/test/CodeGen/AMDGPU/rsq.f32.ll

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