[PATCH] D156647: [AMDGPU] Extend f32 support for llvm.amdgcn.update.dpp intrinsic
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 15 16:46:13 PDT 2023
arsenm accepted this revision.
arsenm added inline comments.
This revision is now accepted and ready to land.
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Comment at: llvm/lib/Target/AMDGPU/VOP1Instructions.td:1205-1206
+def : UpdateDPPPat<i32>;
+def : UpdateDPPPat<f32>;
+
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In a follow on, can/should handle all the legal types (v2i16 and v2f16 are easy, i16/f16 are potentially a little more work)
================
Comment at: llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll:219
+define amdgpu_kernel void @dpp_test_f32_imm_comb8(ptr addrspace(1) %out, float %in1, float %in2) {
+ %tmp0 = call float @llvm.amdgcn.update.dpp.f32(float %in1, float %in2, i32 31, i32 63, i32 128, i1 1) #0
+ store float %tmp0, ptr addrspace(1) %out
----------------
Nit: drop the call site attributes and use true/false instead of i1 0/1
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D156647/new/
https://reviews.llvm.org/D156647
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