[PATCH] D157591: [AArch64][GlobalISel] Optimize Combine Funnel Shift

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/include/llvm/Target/GlobalISel/Combine.td:824
+  (match (wip_match_opcode G_FSHL, G_FSHR):$root,
+    [{ return Helper.matchConstantLargerBitWidth(*${root}, 3); }]),
+  (apply [{ Helper.applyFunnelShiftConstantModulo(*${root}); }])
----------------
not sure if ImmLeafs work 


================
Comment at: llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp:2614
+  // Return true of shift amount >= Bitwidth
+  APInt BitWidth(ConstTy.getSizeInBits(), DstTy.getSizeInBits(), false);
+  return (VRegAndVal->Value.uge(BitWidth));
----------------
Don't need to construct an APInt just to do uge


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D157591/new/

https://reviews.llvm.org/D157591